Date: Sun, 3 Oct 1999 11:55:27 +0200 (IST)
From: Eli Zaretskii <eliz AT is DOT elta DOT co DOT il>
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To: DJ Delorie <dj AT delorie DOT com>
cc: sandmann AT clio DOT rice DOT edu, djgpp-workers AT delorie DOT com
Subject: Re: __dpmi_set_coprocessor_emulation
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On Thu, 30 Sep 1999, DJ Delorie wrote:

> The MP flag enables the hardware interface to the FPU for 386s, and
> enables emulating the WAIT instruction.  Without it, WAIT won't cause
> an emulation exception.  At least, that's what I think the manual is
> trying to tell me.
> 
> The 486 manual says MP should always be set.

Hmm...  What I could glean from my references seems to suggest
otherwise.

The Intel manual (downloaded from their site in PDF format) says under
"8.2.2 Setting the Processor for FPU Software Emulation" (in Table
8-3) that the EM bit should be set and MP bit should be reset.

The DPMI v1.0 Spec explains on p.150, under the decscription of
function 0E01h, that bit 0 specifies the new value of the MPv bit,
whereby 0 disables the coprocessor, and then says in the Notes:
"Floating point emulation can be tested on a system with a numeric
coprocessor by using this function to enable client handling of
coprocessor exceptions and disable the coprocessor."  Here, ``disable
the coprocessor'' seems to imply that the MPv bit should be reset.

The "PC Magazine Programmer's Technical Reference: The Processor and
Coprocessor" book by Robert Hummel says (under "Emulation"):

"If the MP flag is cleared to 0 and the EM flag is set to 1, an
attempt to execute an ESC instruction will automatically cause the
processor to generate interrupt 7 [...]"

Therefore, I think that what you cited refers to the normal setup of
the CPU.  Since i486 has the FPU built-in, they say to set the bit at
all times.  I'd expect that on a system with no FPU, the MP bit is
reset during POST.

Here's an excerpt from CWSDPMI (file exphdlr.c) that might shed some
light on this issue:

    case 0x0E01: /* DPMI 1.0: Set Coprocessor Emulation.  */
      /* Ignore MP bit, since clearing it can cause problems.  We don't
         actually set the EM bit here, since a task swap will set TS and
         cause the same effect (by not using our custom TS clear handler). */
      if((word8)tss_ptr->tss_ebx & 2) {		/* Client supplies emulation */
        idt[7].offset0 = (int)FP_OFF(ivec0) + 7*((int)ivec1-(int)ivec0);
      } else {
        idt[7].offset0 = (int)ivec7;	/* To handle TS bit set faults */


Since CWSDPMI masks off the MP bit, it is not important what is passed
there as long as the program runs under CWSDPMI.

Charles, can you tell what are the problems with resetting the MP bit
to which the comment above refers?