Date: Tue, 11 Jan 2000 14:33:22 -0800
From: Groman <groman AT thehelm DOT com>
Subject: Re: ISR with DJGPP in a kernel.
To: Prashant TR <prashant_tr AT yahoo DOT com>
Cc: djgpp AT delorie DOT com
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Reply-To: djgpp AT delorie DOT com

ok this kind of LIDT, is it right?

_AsmLoadIDT:
 push ebp
 mov ebp, esp


 lidt [idtr]


 mov esp, ebp
 pop ebp

 ret


idtr:
            dw 8*256-1
            dd _IDT
            dw 0


> On Sat, 8 Jan 2000, Groman wrote:
>
> > Ok...here are my steps.
> >
> > 1) I create the IDT and load the register.
> > 2) I reprogram the PIC to shift the IRQs so they do not overlap with the
> > exceptions.
>
> Doing this can cause disasters! 99% of the library functions will become
> unusable to your program.
>
> > 3) I disable all IRQs beside 2 and 0.
>
> Have you taken enough steps to handle the interrupts from IRQ0?
>
> > Now I want to create a handler for 0(the timer) in C...
> > now, how exactly do I do that... I mean it jumps out of the code right
in
> > the middle of the function...and starts another one?
>
> Since, you've changed the IDT and reprogrammed the PICs, you cannot use
> any of the DPMI functions to do this. What you need to do is create
> another selector in the GDT/LDT to point to the ISR, then add the
> appropriate entry to the IDT. Phew!!!
>
> The reason why I guess your ISR is jumping out is probably because you are
> overwriting some of the ISR code.
>
> > shoud I do the handler in assembly that calls C functions then? or is
there
> > a way to turn an ordinary DJGPP function
> > into a handler...
>
> In short, uou can use a C handler, but if you know what you are doing. Why
> do you need to do all this? Isn't the existing IDT and PIC offset ok for
> your kernel?
>
> Prashant
>