Message-Id: <m0wTngr-000S1qC@natacha.inti.edu.ar>
Comments: Authenticated sender is <salvador AT natacha DOT inti DOT edu DOT ar>
From: "Salvador Eduardo Tropea (SET)" <salvador AT inti DOT edu DOT ar>
Organization: INTI
To: Andrew Crabtree <andrewc AT typhoon DOT rose DOT hp DOT com>, djgpp AT delorie DOT com,
        an096 AT yfn DOT ysu DOT edu
Date: Tue, 20 May 1997 15:24:28 +0000
MIME-Version: 1.0
Content-type: text/plain; charset=US-ASCII
Content-transfer-encoding: 7BIT
Subject: Re: -m486 alignment problem
Precedence: bulk

> >   Are you sure there are alignment problems on the PC. I use
> > code that has 16bit wide array structures. And then has another 16bit
> > wide array structure that is offset by 8bits and there is no problem.
> > I thought PC less sensitive in this area than other machines.
> Well the 68K used to fault on misaligned memory accesses, so the x86 
> is less sensitive in that regard.  But, if you have a 4 byte variable, and
> its aligned, thats only one bus access to get it (on a 32 bit bus).  Screw
> up the alignment (shift by 2 bytes),  and now your looking at 2 bus 
> accesses to get it.  Memory is slow enough as is.

The newers x86 have an option to fault on misaligned memory accesses.

SET
------------------------------------ 0 --------------------------------
Visit my home page: http://www.geocities.com/SiliconValley/Vista/6552/
Salvador Eduardo Tropea (SET). (Electronics Engineer)
Address: Curapaligue 2124, Caseros, 3 de Febrero
Buenos Aires, (1678), ARGENTINA
TE: +(541) 759 0013