Date: Sun, 23 Feb 1997 12:05:55 +0200 (IST)
From: Eli Zaretskii <eliz AT is DOT elta DOT co DOT il>
To: George Foot <gfoot AT mc31 DOT merton DOT ox DOT ac DOT uk>
cc: djgpp AT delorie DOT com
Subject: Re: makefile help
In-Reply-To: <5eimif$gos@news.ox.ac.uk>
Message-ID: <Pine.SUN.3.91.970223120410.1447F-100000@is>
MIME-Version: 1.0
Content-Type: TEXT/PLAIN; charset=US-ASCII


On 20 Feb 1997, George Foot wrote:

> If you're only linking one file, you can just use:
> 
> gxx -o foo.exe -Wall -O2 -c foo.cc -lalleg
      ^^^^^^^^^^           ^^
Either -o foo.exe or -c, but not both!  If you want to link, leave out
-c, and it will work.

> In a makefile, you could write:
> 
> all : foo.exe
> 
> foo.exe : foo.o
> 	gxx -o foo.exe foo.o -lalleg
> 
> foo.o : foo.cc foo1.h foo2.h (etc)
> 	gcc -Wall -O2 -c foo.cc

Hey, that's GNU Make we are using, remember?  It doesn't need to be
told all these trivia, it already knows about them.  All you need is
to tell it something it *doesn't* know.  Observe:

	# Variables:
	LINK.cc = gxx $(CXXFLAGS) $(CPPFLAGS) $(LDFLAGS)
	CXXFLAGS = -Wall -O2
	LDLIBS = -lalleg

	# Main target:
	all: foo

	#Dependencies (it already knows about foo.cc):
	foo.o: foo1.h foo2.h

That's all!  The above is enough to produce exactly the same effect as
the Makefile suggested by George.  (Warning: I didn't have time to test 
the above Makefile, so it might include errors.)

If the above is knew to you, type "make -p | less" and you will see
the huge data-base of all the built-in rules that GNU Make knows
about.