From: RHS Linux User <tarquin AT texas DOT net>
Newsgroups: comp.os.msdos.djgpp
Subject: Re: Need help with Inline asm
Date: 13 Jan 1997 18:26:56 -0600
Organization: Texas Networking, Inc.
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To: djgpp AT delorie DOT com
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snippet I will be eternally grateful. Thanks.

If you haven't used Intel asm before, the AT&T stuff is logical. Intel ASM
seems to spoil the mind :)

To start: the code in the book is written for the old 16bit compilers that 
have to worry about ds :) the problem in prot mode is that getting at the 
video mem can be interesting.

change video_buffer to 0x000A0000, 0xA0000000 is the real mode address.

    void PCX_Show_Buffer(pcx_picture_ptr image)
    {
	__inline__ __volatile__ ("	/* volatile keeps the compiler from
					   really messing with the code */
	movw %0, %%ax\n
	movw %%ax, %%es\n
	movl %1, %%edi\n
	movl %2, %%esi\n /* ds already points at data */
	movl %%ecx 16000\n
	cld\n
	rep\n
	movsl\n		/* spiffy fast dword moves */
	:
	:"rm"(_dos_ds),"g"(video_buffer),"g"(image->buffer)
	:"ax","cx","di","si"
      );
    }
ok, to explain: gcc inline asm is essentially just dumped to the output 
(c->s->exe) with some replacement. registers are prefixed with %, opcodes have
the size designated in the suffix (b=byte, w=word, l=long) immediates are
prefixed with $. As for the colon stuff: after the first one goes output
operands, second are inputs, and third are clobbers. You give a restraint
for the operand in quotes, with the var name in parenthesis. You access the
operands with %0 for the first, %1 for the next, and so on. GOTCHA: if you use 
any operands, you have to put an extra % on registers. the arg order is 
reversed for most opcodes, intel goes op dest, src, at&t goes op src, dest.

sorry if this is confusing

-- 
John Allensworth --- tarquin AT texas DOT net --- ReaperMan on the QuakeServers
Author of XtraWeapons (except the homing missile, eject, and throwing axe) 
Industrial Strength Gaming    http://www.uk.digiserve.com/whiteoak/punktc/
Skrew Actura! Dem bastards stole my Bouncing Bettys! (incl. in XW19)