X-Recipient: archive-cygwin AT delorie DOT com Mailing-List: contact cygwin-help AT cygwin DOT com; run by ezmlm List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: cygwin-owner AT cygwin DOT com Mail-Followup-To: cygwin AT cygwin DOT com Delivered-To: mailing list cygwin AT cygwin DOT com Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=1.7 required=5.0 tests=AWL,BAYES_50,RCVD_IN_DNSWL_NONE,SPF_HELO_PASS,SPF_PASS,URIBL_GREY autolearn=no version=3.3.1 spammy=books, workshop, india, HList-Unsubscribe-Post:sk:List-Un X-HELO: smtp-coi-wf-confirmed-04-224.aweber.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aweber.com; s=20180823-2048-2e9cf629; t=1552306253; bh=Bj0c+l5GbldZFCywk0RU++dTWYPx8Gde/ubY5bB68FU=; h=Date:MIME-Version:Content-Type:From:To:List-Unsubscribe:Subject: Sender; b=Hx5UOZnDHLX6cW2UxVtXWE99pzzu91bHPNt6FxbRQ9KiiQnTTZw2mBSHHorDM1qTV dSlK87i3u/RopPBJXXZa3YevG+g/Nki/2giAINePPoxJgkcX827lgVoWkTXQizSJ60 i4JinaxV1SOo/cdZn3G8c5E/7HimD3/Dn58IeZK7N2XCoOmoLGA8nyHvcnunhYIhfW lBNTOvWC8I0gadGAFKiLpo4XagN85ZiM30jlcbWl5oX5yDN40KKHfqUKjKqoPpyH+N 049YOHFmWYKF4IBI2PAGm5e7QEDQKv8xqG6h/Hxr1VOfzl9CXFVuHFC7QXig9syss7 5XMGG/qEL7iMQ== Date: Mon, 11 Mar 2019 12:10:53 +0000 Message-ID: <37.21.25633.D40568C5@momentum-transactional-mta1.prod.aweberint.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Kunal Ghosh" To: cygwin AT cygwin DOT com Require-Recipient-Valid-Since: cygwin AT cygwin DOT com; Mon, 11 Mar 2019 12:10:16 +0000 List-Unsubscribe-Post: List-Unsubscribe=One-Click Subject: Welcome to my community at VLSI SYSTEM DESIGN!! Sender: Kunal Ghosh Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by delorie.com id x2BCB3xo013289 Hey There, In case if you plan to visit or any future RISC-V workshop, you should be aware the basics of RISC-V and so here are the downloadable links for all short books on RISC-V which we have published till date. The last book is a strategy on VLSI Physical design implementation of 2 designs using opensource EDA RTL2GDS flow 'qflow'. Download, read and enjoy.... RISC-V Introduction: https://clicks.aweber.com/y/ct/?l=AZ5mW&m=3yR80EZOX3A8._6&b=c8n8ydIW_9FTy4FMjrNx.Q RISC-V Double-word: https://clicks.aweber.com/y/ct/?l=AZ5mW&m=3yR80EZOX3A8._6&b=30IZwptqm5KgOhf6ONkNCw Why RISC-V architecture has 32 registers: https://clicks.aweber.com/y/ct/?l=AZ5mW&m=3yR80EZOX3A8._6&b=eGpVUdzFSfh1_E2ldNdV3w ABI – Get this one right – RISC-V: https://clicks.aweber.com/y/ct/?l=AZ5mW&m=3yR80EZOX3A8._6&b=jWifwo3PvZzAvcZEqcvNfQ–-Get-this-one-right-–-RISC-V.pdf Wanna quick solution to identify overflows? – Use RISC-V branches https://clicks.aweber.com/y/ct/?l=AZ5mW&m=3yR80EZOX3A8._6&b=hm2GZfhszyjZL24wvUZE4A From VLSI to System Design (SoC) – The choice of SPI: https://clicks.aweber.com/y/ct/?l=AZ5mW&m=3yR80EZOX3A8._6&b=4Zok96WglPb8eG.7FudBEg Book on Physical design using opensource EDA qflow, along with LIVE examples: https://clicks.aweber.com/y/ct/?l=AZ5mW&m=3yR80EZOX3A8._6&b=Z5yY3fhaOVXP_SXZXLE7dQ Outer Ring Road Bangalore Bangalore Karnataka 560037 INDIA To unsubscribe or change subscriber options, visit: https://www.aweber.com/z/r/?zByMDCxMLLTsTCxsnBwM7LRmtEzMHCwsHJys -- Problem reports: http://cygwin.com/problems.html FAQ: http://cygwin.com/faq/ Documentation: http://cygwin.com/docs.html Unsubscribe info: http://cygwin.com/ml/#unsubscribe-simple