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Date: Fri, 14 Aug 2015 20:43:43 +0200
From: Corinna Vinschen <corinna-cygwin@cygwin.com>
To: cygwin@cygwin.com
Subject: Re: Shares with strange ACL settings
Message-ID: <20150814184343.GL28349@calimero.vinschen.de>
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References: <20150812155817.GN13029@calimero.vinschen.de> <878u9g9y6b.fsf@Rainer.invalid> <20150812183220.GO13029@calimero.vinschen.de> <87vbck8h92.fsf@Rainer.invalid> <20150813163302.GB28349@calimero.vinschen.de> <20150813175302.GD28349@calimero.vinschen.de> <20150814082959.GE28349@calimero.vinschen.de> <loom.20150814T125223-728@post.gmane.org> <20150814134552.GG28349@calimero.vinschen.de> <87fv3l683c.fsf@Rainer.invalid>
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On Aug 14 20:25, Achim Gratz wrote:
> Corinna Vinschen writes:
> > Btw., can you please also check /proc/cpuinfo?
>=20
> Yes, I have both AMD and Intel machines I can test this with.
>=20
> > As discussed, Cygwin's emulation fell short on L3 cache info.  I now
> > added code to fetch L3 cache info as well as correct processor topology
> > information on Intel CPUs.  For AMD CPUs the topology and cache
> > info was already fine.  Linux does not show L3 cache info for AMD CPUs
> > afaics, so I also didn't add that to Cygwin.
>=20
> I can't test this with a new enough kernel for AMD, but perhaps someone
> is testing some new iron/OS combination and I can get that information
> from them.  For Intel since some time the L3 cache size is shown (older
> kernels would show you the per-node L2 cache size IIRC).

Recent kernels as well.  I just tested this with a 4.1.4 kernel, and the
source code of the upstream master branch shows no changes in terms of
the cache info on AMD CPUs.

A bit surprising, considering that the L3 cache info is apparently
available using the same CPUID leaf.


Corinna

--=20
Corinna Vinschen                  Please, send mails regarding Cygwin to
Cygwin Maintainer                 cygwin AT cygwin DOT com
Red Hat

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