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Reply-To: <manus@eiffel.com>
From: "Emmanuel STAPF" <manus@eiffel.com>
To: "cygwin users" <cygwin@sourceware.cygnus.com>
Subject: Make question
Date: Tue, 25 Jan 2000 07:32:11 -0800
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In my makefile, I have the following statement:

.c.obj:
	$(CC) $(CFLAGS) -c $<

and I'm using my makefile to generate a `file.obj' from a `file.c' which
will be using to create a `library.lib' file.

However, make fails with the following output:
make: *** No rule to make target `file.obj', needed by `library.lib'.  Stop.

Is there something special to do to allow my implicit rule.

Thanks in advance,
Regards,
Manu


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