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Date:	Tue, 22 Sep 1998 12:24:11 -0500 (EST)
From:	Steven Snyder <ssnyder AT indy DOT net>
X-Sender:	ssnyder AT indy1
To:	pgcc mailing list <beastium-list AT Desk DOT nl>
Subject:	Why use 32-bit reg for 8-bit value?
Message-ID:	<Pine.SUN.3.96.980922120854.9424A-100000@indy1>
MIME-Version:	1.0
Sender:	Marc Lehmann <pcg AT goof DOT com>
Status:	RO
X-Status:	A
Lines:	22

I often see sequences like this in code generated by pgcc v1.1a:

 115 00bf A100000000    movl ptrbase,%eax       ; load pointer
 117 00c9 B920000000    movl $32,%ecx           ; load value to write
 118 00ce 8888AC074000  movb %cl,4196268(%eax)  ; write val to ptr addr

Note that 0x00000020 is moved into reg ECX, then reg CL is actually used.
Why is pgcc bloating up the code with those bytes (the high 24 bits of
ECX) which will never be used?  

My understanding is that you get the same AGI conditions for any register
(e.g. ECX) or *partial* register (e.g. CL) used, so I see no benefit to
using the 32-bit reg when the lower 8-bit reg will do.  

Using only CL in the code above would have reduced the total size of this 
pointer operation from 16 bytes to 13 bytes.  This sounds like a Good
Thing to me.

(FYI, the code above was generated with an optimization level of -O6.)

Thank you.

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