Mail Archives: pgcc/1998/03/12/22:49:20
On Thu, Mar 12, 1998 at 07:17:23PM +0200, Tuukka Toivonen wrote:
> On Thu, 12 Mar 1998, Marc Lehmann wrote:
>
> >> What do you make of the following code. PGCC produces different
> >> results when optimizing then when not optimization. I was
> >> told it has to do with -fno-float-store, but pgcc doesn't appear
>
> Same goes to standard GCC... I was disappointed to found that it didn't
> regard -ffloat-store.
sorry, I fullyy did NOT understand that sentence. gcc/pgcc/egcs should
all exhibit the same behaviour with -ffloat-store (did you mean this?)
> >the x86 chips are not really ieee compliant. that's not too serious, as I'll
>
> This seems to be general misbelief (I've heard it before...).
> The problem is not with Intel FPU. The problem is in C-compiler
no, it's a hardware problem. I could emulate all fpu operations
in software.. problem solved (in compiler). does this make sense though?
tell me how to implement full iee compliance without a considerable
slowdown. no, this is NOT a compiler problem.
> (or maybe in OS... but not in FPU).
sure, the compiler can FIX the problem, just like linux fixes
problems with pentium cpu's. This doesn't make it linux
or compiler problems, though.
> Generally code generated by the C compiler should use the higher precision.
> But there really should be a switch to use IEEE-style lesser precision
> floats (maybe (p)gcc has it, I don't know).
-ffloat-store -mieee-fp
> Even better would be #pragma or something which would allow one to use
pragmas are useless (i'll mention it everytime i see this ;)
> This was not exactly a question, but I hope you don't mind ;)
hey, this is actually one of the most interesting threads ever on
bestium-list ;)
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