Mail Archives: geda-user/2018/12/23/22:39:32

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Date: Mon, 24 Dec 2018 04:37:51 +0100 (CET)
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To: "Peter Stuge (peter AT stuge DOT se) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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From: gedau AT igor2 DOT repo DOT hu
Subject: Re: [geda-user] underconstrained netlists (was: Re: pcb: save
connection data of - anyone ever used this?)
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On Sun, 23 Dec 2018, Peter Stuge (peter AT stuge DOT se) [via geda-user AT delorie DOT com] wrote:

>gedau AT igor2 DOT repo DOT hu wrote:
>> On Mon, 17 Dec 2018, Stephen Ecob wrote:
>> >underconstrained netlists
>> I think it wouldn't be too hard to do that.
>> 1. Feature requests need active pcb-rnd user
>> I would do it only if you already used pcb-rnd by then.
>I use pcb-rnd svn and would help test this feature/development when it

Thanks. As I wrote, I think the slotted forward annotation solves this 
problem. So we should test that. Please download and compile xschem - that 
is the only one schematic editor that has support for this feature.

Schedule/timing: I expect it'll be a thing early next year.

Stefan started working on features required for back annotation so xschem 
will probably have that soon. Once that's done, it's about 1 day of effort 
on pcb-rnd side to introduce the slot swapping feature and then we can 
start testing.

Then if you want these features in another schematic editor (back 
annotation and slot info in fwd annotation), you'll need to request the 
developers there to implement them. We already have the free/open file 
format specs available and soon we will have testable 
code/workflow/demonstration too.



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