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Mail Archives: geda-user/2017/11/04/08:46:29

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X-Recipient: geda-user AT delorie DOT com
Date: Sat, 4 Nov 2017 13:53:50 +0100 (CET)
X-X-Sender: igor2 AT igor2priv
To: geda-user AT delorie DOT com
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From: gedau AT igor2 DOT repo DOT hu
Subject: [geda-user] [pcb-rnd] padstacks - intro & announcement
Message-ID: <alpine.DEB.2.00.1711041332510.27212@igor2priv>
User-Agent: Alpine 2.00 (DEB 1167 2008-08-23)
MIME-Version: 1.0
Reply-To: geda-user AT delorie DOT com

Hi geda-users,

I'm proud to announce that from today pcb-rnd features pad stacks 
(padstacks, or pstk for short in the code) in a testable state. By the 
end of the year, when the next release is scheduled, I expect padstacks 
will be a stable feature, usable in production.


(NOTE: I'm mailing the related detailed announcements in this thread so
if you chose to ignore the progress on pcb-rnd and want to avoid hearing
about how decade old bugs and misfeatures are fixed, it's easier to delete
the whole thread.)


1. What is a padstack?

A padstack is an optional hole (plated or unplated) and a list of 
layertype-shape pairs for the pads. Layertype includes not only copper, 
but any layer type.

2. What can a padstack do?

It is the replacement object for vias, pins and smd pads. It is universal 
enough that it's easy to describe all three cases. It removes almost every 
limitation in those objects that ever got mentioned on the mailing list. 
It's so universal that it can make perfect fiducials and align markers.

3. How does it make a PCB designer's life easier?

It introduces the following features, which will be described in separate 
announcements to keep things shorter:

- almost arbitrary pad shapes for pins, vias and smd pads (e.g. oblong 
pads, asymmetric circles or octagons, hexagons, pentagons, arbitrary 
convex polygons)

- different pad shape on various layers (e.g. smaller pad on inner copper 
layer vs. larger pad on outer copper layer)

- possibility for explicit, user defined shapes even on mask and paste 
layers

- blind/buried via

- cache/library of matching padstacks - possibility to change one and 
affect all instances, but also possibility to take out a single padstack 
from the group to deviate

- thermal on anything - there's no difference between smd pad or pin

4. How does it make the coder's life easier?

- a single, unified object instead of 3 different objects (via, pin, pad)

- shape is not a flag anymore - no more square or octagon flag, but a 
clean API that returns the actual shape on the given layer

- pcb-rnd has extensive IO capability to other file formats (kicad, eagle, 
hyperlinks, etc.); with padstacks it's much easier to reproduce their pads

5. Next steps, what to expect

First, we are getting padstack related bugs and missing features fixed in 
trunk/ as our users are starting to test it. Then the next release, 
scheduled to the end of 2017, will feature a hopefully 100% stable, 
production quality padstack support.

We will then start rewriting the IO plugins to support padstacks instead 
of vias, pins and pads. This includes the .pcb plugin too - it will 
convert old data to padstacks on load and padstacks to old data on save, 
transparently.

Finally, when no code uses the old data model anymore, we will remove 
a lot more code than we had to add for padstacks and subcircuits. We will 
remove pads, pins, vias, elements, element lines and element arcs. This 
will probably happen some time in 2018.

6. How to use padstacks?

If you are interested, keep on reading the followups in this thread. Then 
get pcb-rnd from svn, join the irc channel to get support and report bugs. 
Or just wait until others do the testing and start using the feature when 
it's already stable. (But I think the later you try pcb-rnd, the more 
you'll need to learn at once, just because of the sheer amount of fixes 
and cleanups and restriction removals and long demanded new features).

Regards,

Igor2



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