Mail Archives: geda-user/2017/08/31/00:28:20
Hi gEDA users,
the subcircuit effort has reached the next phase, as planned: subcircuits
can be used as footprints now.
1. what we have now
Any subcricuit member object can be marked as a "terminal", which is the
generic replacement of pins and pads. A terminal has an ID (which original
pins and pads call "number" even tho it is not always a number). Terminal
IDs are the "pin" named in the netlist. This makes subcircuit terminals
interact with the netlist.
Subcircuits now have a refdes attribute; this data is used to find the
subcircuit when processing the netlist. Beause refdes is just an
attribute, it's optional and it got decoupled from silk text. Subcircuits
don't have the old "refdes, value, description" forced silk texts anymore
- you can go with zero silk text objects or more than 3 if you want. (I'll
soon add a feature so that text objects can print attributes so the good
old "print refdes as silk text" will work again).
This means from now on pcb-rnd has footprints without the old
pcb-footprint-limitations. Listing a few random examples what this
includes:
- non-pad copper objects
- custom polygon on any layer (copper, silk, paste, mask, etc.)
- that also means custom paste patterns or mask cutouts without having to
do "pad hacks"
- custom polygon on copper tagged as a terminal: custom shaped pads,
without having to combine them from dozens of rectangular pads
- preliminary slot support: a footprint can include objects on the outline
layer
- via that doesn't turn into a pin; you can even use internal layers in
your footprint -> you can make a bga fanout footprint
- text on copper, arc on copper, polygon on silk
2. short term plans
There are still some sharp edges we will be working on for the next few
weeks. By the next release (October), using subcircuits for footprints
will be stable and will be the officially recommended/supported way of
using pcb-rnd.
3. long term plans
Depending on how the testing and bugfixing goes, the next development
cycle after October may remove the old element/pin/pad support (many
thousand lines of code). This change should be transparent: if you have
old board files, we'll convert their elements to subcircuit on load and we
will convert subcircuits back to elements on save to those old formats.
In parallel to that, the next big chunk of related work will be pad
stacks.
Pad stacks will allow circular or arbitrary shaped polygon pads, that can
be different, per layer and an optional hole. This means:
- vias can have different copper geometry per layer
- blind/buried vias
- since pins are just vias tagged as terminal, all these apply to "pins"
as well
- an "smd pad" can be represented as a pad stack that has polygon only on
one copper layer (which happens to be the top or bottom physical layer)
and no hole
Regards,
Igor2
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