Mail Archives: geda-user/2017/02/17/10:07:29
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On Feb 16, 2017, at 12:52 AM, gedau AT igor2 DOT repo DOT hu wrote:
> - specified a netlist block that is capable enough for our current =
problem but does not cut off other =
flows:http://repo.hu/projects/tedax/netlist.html
Except that it doesn=92t succeed from where I sit. It=92s very =
pcb-centric. It has fields for SPICE, but they aren=92t informed by the =
intricacies of actual SPICE problems. Other layout programs such as =
Allegro model components differently than pcb, and that=92s not taken =
into account here.
A bare netlist is a well-defined abstraction. That produces the illusion =
that a common netlist file format can be created. But once you start =
adding additional information, this breaks down. There is no consensus =
abstraction beyond the bare netllist. Gnetlist is actually pretty good =
here: the back ends get the vast majority of components right, but if =
you need a complicated schematic that netlists properly for multiple =
layout programs and simulators, a few of your symbols will require some =
serious extra care with their attributes. This isn=92t because of a lack =
of a common intermediate format: it=92s because different tools have =
different models of the problem space.
Historically we have EDIF, a format with the sort of ambition you have. =
It failed. I actually tried to use it about a quarter century ago to =
transfer a very simple netlist from Viewlogic to a layout program (I =
forget whose) that claimed to support it. It was a massive waste of =
time.
Then, there=92s Al Davis=92s similar proposal for gEDA. It=92s =
gnucap-centric rather than pcb-centric. I note you didn=92t adopt that.
John Doty Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd AT noqsi DOT com
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