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Mail Archives: geda-user/2016/08/02/20:59:52

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From: "Evan Foss (evanfoss AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
Date: Wed, 3 Aug 2016 00:58:32 +0000
Message-ID: <CAM2RGhTKLDKifETFadQ9ZxcWR_kM2Z020obx81dgNLrjaCCtsA@mail.gmail.com>
Subject: Re: [geda-user] Wilkinson splitter - how to implement and use?
To: gEDA users mailing list <geda-user AT delorie DOT com>
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On Tue, Aug 2, 2016 at 11:33 PM, Larry Doolittle
<ldoolitt AT recycle DOT lbl DOT gov> wrote:
> Evan -
>
> On Tue, Aug 02, 2016 at 04:47:05PM -0400, Evan Foss (evanfoss AT gmail DOT com) [via geda-user AT delorie DOT com] wrote:
>> On Mon, Aug 1, 2016 at 6:44 PM, Erich Heinzle (a1039181 AT gmail DOT com)
>> [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>> > If pcb were modified to honour the flag, I could easily add a "nodrc" flag
>> > as discussed to the non-pad line element outputs of the utility.
>> I think we need something more subtle than nodrc. Having DRC turned
>> off for a specific footprint or any other board area is just as bad as
>> having DRC return bogus warnings/errors.
>
> I agree in general.  For the copper structures wished for to handle
> star grounds and Wilkinson splitters, we actually want the layer
> to exist for DRC purposes, but not for netlist purposes.  So a
> "nonetlist" flag?

The netlist still applies but everything you put in between microwave
structures adds parasitics. Microwave requires something different in
terms of how we consider what a component ends and a footprint begins.
Microwave structures are probably almost all going to be
programatically generated (plugins). We have infrastructure to support
that. Back annotation after you add connecting stuff is troublesome
because back annotation isn't in the mainline (yet) but that can be
fixed.

Most microwave layouts will still have non-microwave parts like a
voltage regulator to keep bias voltages. We need more than one DRC
system and not a way to switch between them. To keep DRC execution
time reasonable I think we have to avoid actually fully invoking
Maxwell every time anyone adds a trace.

The analysis after layout might reveal additional issues DRC missed
but we need to invent a flow that can do that (gmsh, openfoam, and
etc) which comes after 3d models are in effect.

>> The reality is that these structures are not footprints but functional
>> elements. They have design rules, just very different ones with higher
>> orders of complexity. We can't really have pcb process the full
>> complexity of these rules across the whole domain from DC to daylight
>> (or shorter) because of limitations in processing. It would also
>> require a level of developer time which is far past what pcb-* has
>> right now.
>
> Without diving into a more general capability set, this particular tweak
> _sounds_ simple enough to me.  But my limited experience poking around in
> the internals of the existing pcb code base makes me predict it will be
> difficult to do without breaking somethings else.  Maybe I'll look at
> pcb-rnd and see if that looks any more promising.

Ok. To be honest until DJ pointed out to me where the DRC was I
couldn't even find it.

I am talking to Igor2 about changing the DRC for a number of other
reasons. I don't know if it will happen but it is worth seriously
considering.

>   - Larry

Evan

-- 
Home
http://evanfoss.googlepages.com/
Work
http://forge.abcd.harvard.edu/gf/project/epl_engineering/wiki/

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