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Mail Archives: geda-user/2016/02/29/04:27:13

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Mon, 29 Feb 2016 01:26:38 -0800 (PST)
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Date: Mon, 29 Feb 2016 12:26:38 +0300
Message-ID: <CAMvDHVCsqDvpRvXL-2BsPWGg5TqME9rtKk-xV+5um2kmnLFgQw@mail.gmail.com>
Subject: Re: [geda-user] hierarchical design - two symbols pointing to one schematic
From: "Vladimir Zhbanov (vzhbanov AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Hagen,

On 2/28/16, Hagen SANKOWSKI <hsank AT nospam DOT chipforge DOT org> wrote:
> Hello.
>
> Thanks for your answer.
> During this week I rectify my design, but still ending up - after a long,
> long runtime something in hours on a VirtualBox with a lot of RAM and 4 CPUs
> -
> with a gnetlist line which said: Killed.

Well, I did 'git grep "[Kk]illed" in the geda-gaf repository and
found nothing but one word in the documentation for icarus. So I
suppose the OOM-killer kills your gnetlist when it goes into a big
loop for some reason and eats all the memory resources.

>
> Well, I tried to do my hierarchical design a little bit smaller and run
> just
> a sup-page (which is still hierarchical) successfully thrue gnetlist.
>
> I got a bunch of lines from gnetlist for my hierarchical design like this:
> "Found a pin [Y300/Y2] on component [26] which does not have a label!"
>
> Well, I found the Source Code via DuckDuckGo here (sorry for the bad
> reference!)
> http://ljh4timm.home.xs4all.nl/gaf/dox_gnetlist/s__hierarchy_8c_source.html
>
> IMHO the arguments for the fprint(stderr, ..) function should be swapped.
>
> 00206                 nl_current->component_uref,
> 00207                 pl_current->pin_number);
>
> The first argument should be the pin number, the second one should be
> the component.
> This lines, I guess, are coming from hidden VDD and GND nets inside my
> hierachichal
> symbols.
>
> Nevertheless I like to feed my whole gschem-Design now into PCB now.
> So who is killing my gnetlist-process inside gsch2pcb? Any suggestion how
> to
> find/avoid the reason for the gnetlist-death?

Probably the best way to find the culprit is to start with some
little schematic and make it more complex step by step every
time checking if your forward annotation process works correctly.

There is the gschem->gsch2pcb->PCB tutorial in the wiki [1], you
can use it as an example.

HTH,
  Vladimir

[1] http://wiki.geda-project.org/geda:gsch2pcb_tutorial

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