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Mail Archives: geda-user/2016/01/26/13:04:28

X-Authentication-Warning: delorie.com: mail set sender to geda-user-bounces using -f
Date: Tue, 26 Jan 2016 13:04:20 -0500
Message-Id: <201601261804.u0QI4KEQ009550@envy.delorie.com>
From: DJ Delorie <dj AT delorie DOT com>
To: geda-user AT delorie DOT com
In-reply-to:
<CANEvwqgs3YFnt7m8mA1DN6X2KdWbyr4zpXCVH321vDo1f7CyxA AT mail DOT gmail DOT com>
(geda-user AT delorie DOT com)
Subject: Re: [geda-user] [pcb] poll: burried/blind vias vs. pcb and pcb-rnd
(How ?)
References: <alpine DOT DEB DOT 2 DOT 00 DOT 1601180756390 DOT 9035 AT igor2priv>
<alpine DOT DEB DOT 2 DOT 00 DOT 1601260416150 DOT 9035 AT igor2priv>
<56A751EC DOT 8030402 AT iae DOT nl>
<20160126124701 DOT 0d061912c7e078ced9d4e6cb AT gmail DOT com> <CANEvwqgs3YFnt7m8mA1DN6X2KdWbyr4zpXCVH321vDo1f7CyxA AT mail DOT gmail DOT com>
Reply-To: geda-user AT delorie DOT com

> In this day and age to say blind/buried vias are not needed is ridiculous.
> The fact is ANY design that requires even one FPGA, custom ASIC or
> medium to large BGA needs blind/buried vias.
> 
> This is factual and is easy vetted.

If you can afford a custom ASIC, you can afford a top-end EDA package,
and a FAB that supports high-end features.  Frankly, PCB is not a
high-end package and custom ASIC users are not our target audience.

I can't afford any of that tech.  Heck, I can barely afford 4-layer
boards with 6/6 rules.  There's a huge community of designers that
can't (or won't) afford high tech features in their boards.

So you can say "this is factual" but it's not.  It may be a
requirement for a subset of our potential user base, but it's not
ridiculous to assume that many people just aren't going to use them.
Until we decide to support that tech, we're simply targetting the
"many people" who don't need them.

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