Mail Archives: geda-user/2016/01/26/06:47:38

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Tue, 26 Jan 2016 03:47:07 -0800 (PST)
Date: Tue, 26 Jan 2016 12:47:01 +0100
From: "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] [pcb] poll: burried/blind vias vs. pcb and pcb-rnd
(How ?)
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> The conclusion from the poll is also that there is no strong demand to 
> support/provide windows binaries.
> However IMO blind/burried vias and windows availability are essential to 
> attract new users, I do hope that that broader scope is picked-up by 
> main stream pcb.
> Cheers,
> Robert.

Even though it should not be implemented right now it could be good with a discussion how it ideally should work.

An essential question is how it should be defined in pcb. On a higher level I could see a choice between the layers in form of board/laminate it make hole in or to define between which layers it should be drilled/connected. I could identify three different implementation methods immediately:
  1. Define on which layers there should be a hole.
  2. Define between which copper layer via should be.
  3. In principal define which layers should be connected by connecting on the particular layer.

Number (3.) may be good because layers needed to span will be implicitly given by on which layer via is used but there are a few problems:
  1. Then there are two different via above each other that do not connect, how to handle for the user?
  2. Snap to via, how to choose between bypass and connect?
Then it is implicitly given which layer need to connect I guess the minimum possible layers to span for the current design could be chosen automatically for the most common cases although it would still be possible to implement override if needed.

Nicklas Karlsson

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