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Mail Archives: geda-user/2016/01/19/11:20:24

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Subject: Re: [geda-user] pcb loop paste buffer, renumber (first multi channel design)
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From: John Doty <jpd AT noqsi DOT com>
In-Reply-To: <CAJXU7q_AZ3Z9k3Cm1zKAoZHjPc4xETixTji5r2G2L_0AJqRACw@mail.gmail.com>
Date: Tue, 19 Jan 2016 09:19:02 -0700
Message-Id: <96588D7E-3ADB-4F73-99DD-9E737AFF31B4@noqsi.com>
References: <20151021192359 DOT 3dd8ad6d253c781da5523554 AT gmail DOT com> <201510211839 DOT t9LIdVcv027165 AT envy DOT delorie DOT com> <20151021222506 DOT 79643602de30ad2dd5541165 AT gmail DOT com> <20151022115247 DOT 3c1c2f13 AT akka> <20151022123903 DOT dddb6c83fa5a3db0963f4162 AT gmail DOT com> <201510221641 DOT t9MGfxJq003243 AT envy DOT delorie DOT com> <20151022212642 DOT abe0686f3bb04a3067667c43 AT gmail DOT com> <201510221951 DOT t9MJpjgA013544 AT envy DOT delorie DOT com> <562951C5 DOT 2010500 AT xs4all DOT nl> <562B531C DOT 5090004 AT xs4all DOT nl> <20160118171041 DOT 60f9ff0fd41a668af0fa84f4 AT gmail DOT com> <569D3751 DOT 2020402 AT xs4all DOT nl> <569D4266 DOT 7000905 AT prochac DOT sk> <20160119135636 DOT 8b2397941a5d4c4f48c9a626 AT gmail DOT com> <569E3532 DOT 2000701 AT iee DOT org> <20160119145802 DOT 81daa1f66cbb5cfebbba834c AT gmail DOT com> <569E4CE9 DOT 6030900 AT iee DOT org> <CAJXU7q_AZ3Z9k3Cm1zKAoZHjPc4xETixTji5r2G2L_0AJqRACw AT mail DOT gmail DOT com>
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On Jan 19, 2016, at 8:53 AM, Peter Clifton =
(petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com] =
<geda-user AT delorie DOT com> wrote:

> Really you need to have a reuse at the schematic level before you can =
expect any intelligent behaviour in the pcb tool.
>=20
> I've done multi channel designs with hierarchical schematics before... =
The rename just becomes X1/R1 -> X2/R1 etc...
>=20
> My rename plugin might still be floating about somewhere =
"sedrename"... Now we've got more plugins committed with the main =
repository, it might be fun to dig that one out and include it too... =
Was very handy when your transformation between channels can be =
expressed as a regex.
>=20
> The main downside with heirarchical refdes is the silkscreen and board =
fab house. They HATED IT. Couldn't cope with the long heirarchical =
refdes, didn't WANT to cope with the patch I applied to just put the =
last heirarchical part on the silk by each part, but then drew boxes =
manually with module designations.
>=20
>=20

The printed circuit culture is a little behind the times. With some =
gnetlistrc/Makefile work, you can make hierachical netlists from gschem =
schematics. They=92re useful if you=92re doing ASIC design, but you get =
various downstream issues if you want printed circuits.
> In the end, I used pcb's renumber feature to assign completely new =
refdes on the board, but instead of back annotating (impossible as we =
stand, with heirarchical schematics),I added a quick kludgy patch to =
read back in the rename file, so pcb could map between the gnetlist =
produced heirarchical netlist, and the flat refdes on the board.
>=20
> Made debugging extra fun, having to manually indirect from =
heirarchical schematic refdes to on board refdes, but at least it didn't =
upset the board assembly fab!
>=20
> I suppose I could also have post proceed out a flattened set of =
schematics with the renamed refdes if that became useful.
>=20
>=20

Existing capability. You can flatten schematics with =
https://github.com/xcthulhu/lambda-geda, and then edit the refdeses with =
textutils. Or you can use one of the refdes renumberers kicking around =
after flatten.
> Peter
>=20

John Doty              Noqsi Aerospace, Ltd.
http://www.noqsi.com/
jpd AT noqsi DOT com



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<html><head><meta http-equiv=3D"Content-Type" content=3D"text/html =
charset=3Dwindows-1252"></head><body style=3D"word-wrap: break-word; =
-webkit-nbsp-mode: space; -webkit-line-break: =
after-white-space;"><br><div><div>On Jan 19, 2016, at 8:53 AM, Peter =
Clifton (<a =
href=3D"mailto:petercjclifton AT googlemail DOT com">petercjclifton AT googlemail DOT co=
m</a>) [via <a =
href=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT com</a>] &lt;<a =
href=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT com</a>&gt; =
wrote:</div><br class=3D"Apple-interchange-newline"><blockquote =
type=3D"cite"><p dir=3D"ltr">Really you need to have a reuse at the =
schematic level before you can expect any intelligent behaviour in the =
pcb tool. </p><p dir=3D"ltr">I've done multi channel designs with =
hierarchical schematics before... The rename just becomes X1/R1 -&gt; =
X2/R1 etc...</p><p dir=3D"ltr">My rename plugin might still be floating =
about somewhere "sedrename"... Now we've got more plugins committed with =
the main repository, it might be fun to dig that one out and include it =
too... Was very handy when your transformation between channels can be =
expressed as a regex.</p><p dir=3D"ltr">The main downside with =
heirarchical refdes is the silkscreen and board fab house. They HATED =
IT. Couldn't cope with the long heirarchical refdes, didn't WANT to cope =
with the patch I applied to just put the last heirarchical part on the =
silk by each part, but then drew boxes manually with module =
designations.</p><div><br></div></blockquote><div><br></div>The printed =
circuit culture is a little behind the times. With some =
gnetlistrc/Makefile work, you can make hierachical netlists from gschem =
schematics. They=92re useful if you=92re doing ASIC design, but you get =
various downstream issues if you want printed circuits.<br><blockquote =
type=3D"cite"><p dir=3D"ltr">In the end, I used pcb's renumber feature =
to assign completely new refdes on the board, but instead of back =
annotating (impossible as we stand, with heirarchical schematics),I =
added a quick kludgy patch to read back in the rename file, so pcb could =
map between the gnetlist produced heirarchical netlist, and the flat =
refdes on the board.</p></blockquote><blockquote type=3D"cite"><p =
dir=3D"ltr">Made debugging extra fun, having to manually indirect from =
heirarchical schematic refdes to on board refdes, but at least it didn't =
upset the board assembly fab!</p><p dir=3D"ltr">I suppose I could also =
have post proceed out a flattened set of schematics with the renamed =
refdes if that became =
useful.</p><div><br></div></blockquote><div><br></div><div>Existing =
capability. You can flatten schematics with&nbsp;<a =
href=3D"https://github.com/xcthulhu/lambda-geda">https://github.com/xcthul=
hu/lambda-geda</a>, and then edit the refdeses with textutils. Or you =
can use one of the refdes renumberers kicking around after =
flatten.</div><blockquote type=3D"cite"></blockquote><blockquote =
type=3D"cite"><p dir=3D"ltr">Peter</p>
</blockquote></div><br><div apple-content-edited=3D"true">
<span class=3D"Apple-style-span" style=3D"border-collapse: separate; =
border-spacing: 0px;"><p style=3D"margin: 0.0px 0.0px 0.0px 0.0px"><font =
face=3D"Helvetica" size=3D"3" style=3D"font: 12.0px Helvetica">John =
Doty<span class=3D"Apple-converted-space">&nbsp; &nbsp; &nbsp; &nbsp; =
&nbsp;<span class=3D"Apple-converted-space">&nbsp;</span><span =
class=3D"Apple-converted-tab">&nbsp; &nbsp;<span =
class=3D"Apple-converted-space">&nbsp;</span></span></span>Noqsi =
Aerospace, Ltd.</font></p><p style=3D"margin: 0.0px 0.0px 0.0px =
0.0px"><a href=3D"http://www.noqsi.com/">http://www.noqsi.com/</a></p><p =
style=3D"margin: 0.0px 0.0px 0.0px 0.0px"><font face=3D"Helvetica" =
size=3D"3" style=3D"font: 12.0px Helvetica"><a =
href=3D"mailto:jpd AT noqsi DOT com">jpd AT noqsi DOT com</a></font></p><br =
class=3D"Apple-interchange-newline"></span>
</div>
<br></body></html>=

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