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Mail Archives: geda-user/2016/01/02/13:16:25

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Date: Sat, 2 Jan 2016 13:16:17 -0500
Message-Id: <201601021816.u02IGHCC021127@envy.delorie.com>
From: DJ Delorie <dj AT delorie DOT com>
To: geda-user AT delorie DOT com
In-reply-to: <20160102191018.5e68c0c4ecc70a49bd9998f6@gmail.com>
(geda-user AT delorie DOT com)
Subject: Re: [geda-user] ideas on slotting and mechanisms for
grouping/associating heterogenous symbols.
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> That's a collision. Ideally all symbols ending up in the same
> footprint should have the same refdes. I would say the naming scheme
> for hierarchy does not fit for this case and I can't figure out how
> to get a good solution.

Consider, for example, you have eight NAND gates in your circuit, in
two quad packages.  You decide that swapping two gates across packages
would make sense for the layout.  However, this changes the refdes for
those two gates, so you have to manually pre-swap them in the
schematic.

Should this be something you can do in the layout program?

If so, how do you specify "that gate" in the schematic when you want
to make an as-built?

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