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From:	"Stephan =?utf-8?Q?B=C3=B6ttcher?= (geda AT psjt DOT org) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] Star shorts
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Date:	Sat, 24 Oct 2015 22:18:49 +0200
In-Reply-To:	<201510240528.t9O5S5qc019927@envy.delorie.com> (DJ Delorie's
	message of "Sat, 24 Oct 2015 01:28:05 -0400")
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DJ Delorie <dj AT delorie DOT com> writes:

> Of course, anything like this would predicate a new DRC :-(

DRC should be something that can also be applied to the Gerber layout,
i.e., it should look at the actual copper.  No need for a new DRC.

The star ground is a netlist issue, LVS.  That is part of 'optimize rats
nest' in pcb.

I think is is good to keep that distinction, between DRC and LVS.

If some copper object is designated as the connection between two ground
nets, the 'optimize rats nest' sees two nets and the requirement that
both connect to that object, and that there are no further connections
betwenn the nets.

I don't see that there is much that needs changing.  Maybe not much more
than a flag on a layer (belonging to a copper group), or a via/pin, that
says: Ignore this for LVS.  The copper object can be part of a
component, to represent the required connections.  Allow a pin or pad to
have two or more pinnumbers.

My ground nets newer connect in a star topology.  There are power return
routing, chassis ground, analog reference ground, digital reference
ground.  And often there need to be multiple conections between the
those ground nets, e.g., close to each ADC between analog and digital
ground.

-- 
Stephan

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