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Mail Archives: geda-user/2015/10/21/08:06:59

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Wed, 21 Oct 2015 05:06:44 -0700 (PDT)
Date: Wed, 21 Oct 2015 14:06:42 +0200
From: "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: geda-user AT delorie DOT com
Subject: Re: [geda-user] Pin mapping (separate symbols from mappings)
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> > I think it would be rather good to separate symbols from pin mapping and in
> > such case symbols would have symbolic information only.
> > 
> > In gschem schematic could be started with a fast sketch there details are
> > filled in later then more information is available and this is one of the
> > best things with gschem.
> > 
> > To keep this strength symbols should be used to draw the schematic and
> > mappings selected later. To make this work there would need to be a pin
> > mapping attribute to select which mapping to use, this attribute could of
> > course already have a default value and it could also be to a slot.
> > 
> > 
> > 
> > I have used other tools there the mapping is added and in such case all
> > information including value must be known then symbol is added which is
> > usually not the case.
> > 
> > 
> > 
> > Nicklas Karlsson
> 
> I think that one possible solution is to alow nested symbols, so we may create 
> heavy symbol that includes another light symbols. I did some tests and this 
> partially works! 
> The symbol 2N2222-1.sym defines component name/footprint and contains another 
> symbol transistor-npn.sym, which contains graphical representation and pins. 
> Gschem displays graphics and pins correctly but attributes from inner symbols 
> are not displayed or promoted.
> Netlisting does not work too (at least by gnetlist).
> 
> To solve the pin mapping, the slotting mechanism could be used.  To convert 
> internal device pins (E, B, C) to package pins (1, 2, 3) the following syntax 
> couuld be used:


There are several mechanisms to choose from and store several different mappings within symbol will work.

What I consider important is then using it should be possible to work like this:
  1. Add symbol to schematic.
  2. Change value, this may not be needed for all cases for example some ICs.
  3. Select footprint, a default value may be useful in some cases.
  4. Transfer to pcb.
  5. Generate a BOM from schematic without need to update layout file even if component value changed.

As is now mapping of footprint does not only work properly, it would also be useful to map one symbolical pin "gnd" to several footprint pins. This should be done automatically as long as mapping is available. It is not possible to work like this in for example PADS.

Nicklas Karlsson

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