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Mail Archives: geda-user/2015/10/12/15:05:40

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Date: Mon, 12 Oct 2015 15:05:29 -0400
Message-Id: <201510121905.t9CJ5T9W026297@envy.delorie.com>
From: DJ Delorie <dj AT delorie DOT com>
To: geda-user AT delorie DOT com
In-reply-to: <1042003D-82E2-40F0-AB60-8186580C46AD@noqsi.com> (message from
John Doty on Mon, 12 Oct 2015 12:25:40 -0600)
Subject: Re: [geda-user] A lesson from gnet-makefile
References: <1042003D-82E2-40F0-AB60-8186580C46AD AT noqsi DOT com>
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> A schematic doesn't capture the relationships between the net
> segments.

I've seen many non-geda schematics that *do* try to at least give a
symbolic view of the desired network topology, especially in cases of
star grounds or joining analog and digital grounds.  Given that
"joining grounds" is a popular request in pcb, perhaps we need to
reconsider having nets be fully collapsed (both on pcb and gaf).

What about a heirarchical net?  I.e.

(net "unnamed-5" ("U1-4" "U5-3" "R1-1"))

(net "unnamed-6"
   (net "AGND" (...))
   (net "DGND" (...))
   )

> But, suppose instead that we had a pin attribute that said "this pin
> may draw three amps". The netlister could then deduce which paths on
> a net need extra conductor.

You also need to know the acceptable temperature rise, although that
could be stored elsewhere.

> the pair is a balanced transmission line

I'm almost thinking those are common enough to be their own type,
since they're something more than a wire but less than a component.
Advanced layout tools let you route them as a single "signal" too.

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