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	Sat, 06 Jun 2015 11:41:49 -0700 (PDT)
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Date:	Sat, 6 Jun 2015 10:41:49 -0800
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Subject:	Re: [geda-user] how to avoid 'Cant find PINLABEL pin1 called for in netlist'?
From:	"Britton Kerin (britton DOT kerin AT gmail DOT com)" <geda-user AT delorie DOT com>
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Sorry bad description of the problem by me.  First off I meant PINLABEL to
stand for the name I give the pin (e.g. OUT_5V), and the error message is
actually 'pin 1' and not pin1.

The error crops up during optimize in the .pcb file I use for the subcircuit.
Once the subcircuit layout is imported into PCB and the refdeses changed
(via a script), the error goes away, presumably because the hierarchical
design flow of between gschem and PCB understands the situation and knows
not to worry about those pins.

The only difference I notice between your approach and mine is that you
dont set pinlabel for the interface pins in the subcircuit schematic, which
I doubt would make a difference (the fact that you aren't trying to make a
.pcb from the subcircuit alone seems more likely to be the cause).

Britton

On Sat, Jun 6, 2015 at 1:20 AM, Jonatan Ã…kerlind <jonatan AT akerlind DOT nu> wrote:
> On fre, 2015-06-05 at 15:52 -0800, Britton Kerin
> (britton DOT kerin AT gmail DOT com) wrote:
>> It all works but PCB ends up complaining:
>>
>>      'Cant find PINLABEL pin1 called for in netlist'
>>
>
> Do you have a "pin1" either in the subschematic symbol used in the top
> level schematic, or in an IO symbol on the subschematic, that is not
> connected anywhere? Would be easier to spot the error with access to the
> schematics and symbols.
>
> I use hierarchical schematics with netlist export to pcb without such
> problems. Examples can be seen here:
>
> https://github.com/natanoj/heatcontrol
>
> One simple top level schematic is this one:
> https://github.com/natanoj/heatcontrol/blob/master/schem/roomunit/roomunit-psu-daughter.sch
>
> with one child:
> https://github.com/natanoj/heatcontrol/blob/master/schem/roomunit/roomunit-poe-dcdc.sch
>
> and corresponding subschematic symbol in top level schematic:
> https://github.com/natanoj/heatcontrol/blob/master/schem/sym/poe-dcdc.sym
>
> A layed out pcb of this circuit:
> https://github.com/natanoj/heatcontrol/blob/master/pcb/roomunit-psu.pcb
>
> /Jonatan
>

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