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Subject: | Re: [geda-user] how to avoid 'Cant find PINLABEL pin1 called for in |
netlist'? | |
From: | Jonatan =?ISO-8859-1?Q?=C5kerlind?= <jonatan AT akerlind DOT nu> |
To: | geda-user AT delorie DOT com |
Date: | Sat, 06 Jun 2015 11:20:11 +0200 |
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On fre, 2015-06-05 at 15:52 -0800, Britton Kerin (britton DOT kerin AT gmail DOT com) wrote: > It all works but PCB ends up complaining: > > 'Cant find PINLABEL pin1 called for in netlist' > Do you have a "pin1" either in the subschematic symbol used in the top level schematic, or in an IO symbol on the subschematic, that is not connected anywhere? Would be easier to spot the error with access to the schematics and symbols. I use hierarchical schematics with netlist export to pcb without such problems. Examples can be seen here: https://github.com/natanoj/heatcontrol One simple top level schematic is this one: https://github.com/natanoj/heatcontrol/blob/master/schem/roomunit/roomunit-psu-daughter.sch with one child: https://github.com/natanoj/heatcontrol/blob/master/schem/roomunit/roomunit-poe-dcdc.sch and corresponding subschematic symbol in top level schematic: https://github.com/natanoj/heatcontrol/blob/master/schem/sym/poe-dcdc.sym A layed out pcb of this circuit: https://github.com/natanoj/heatcontrol/blob/master/pcb/roomunit-psu.pcb /Jonatan
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