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Date: | Tue, 14 Jan 2014 08:20:48 +0100 |
From: | Jan Kasprzak <kas AT fi DOT muni DOT cz> |
To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] 4-pin SPST microswitch |
Message-ID: | <20140114072048.GD18632@fi.muni.cz> |
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Vladimir Zhbanov wrote: : On Tue, Jan 14, 2014 at 12:19:32AM +0100, Jan Kasprzak wrote: : ... : > : Why not just add "an additional PCB layer", connect the pins there, and : > : then make the layer invisible for further routing? : > : > I have tried that, but it is necessary to add it to the : > "component side" group in order to have the pins of the microswitch : > connected. And as soon as I do it, the connections on that new layer : > start to conflict with the regular connections in the "top" layer". : Why is it necessary? I supposed the new layer must be in a separate : group. If so, its lines shouldn't interfere with another layers while : the connections through pins should reach them. Am I wrong? It would be true for through-hole pins, but as far as I have tried, it does not work for pads of SMD-mounted components. : > Anyway, I would like to have the "pins 1 and 2 are electrially : > connected to each other inside the component" property to be the : > property of the footprint itself, not as something I have to work around. : > Any other ideas? : File a bug report and wait while some developer implements this? I may do this, but firstly I would like to see an ACK (or at least not a strong NAK) from the developers in order to not waste their (and my own) time. -Yenya -- | Jan "Yenya" Kasprzak <kas at {fi.muni.cz - work | yenya.net - private}> | | New GPG 4096R/A45477D5 - see http://www.fi.muni.cz/~kas/pgp-rollover.txt | | http://www.fi.muni.cz/~kas/ Journal: http://www.fi.muni.cz/~kas/blog/ | Please don't top post and in particular don't attach entire digests to your mail or we'll all soon be using bittorrent to read the list. --Alan Cox
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