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Mail Archives: geda-user/2013/07/18/14:48:11

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Thu, 18 Jul 2013 11:46:58 -0700 (PDT)
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Date: Thu, 18 Jul 2013 11:46:58 -0700
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Subject: Re: [geda-user] PCB BGA (ball grid array) Package/Footprint
From: Russell Dill <Russ DOT Dill AT asu DOT edu>
To: geda-user AT delorie DOT com
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On Thu, Jul 18, 2013 at 11:29 AM, Rob Butts <r DOT butts2 AT gmail DOT com> wrote:
> I'm not sure exactly what you mean here,
>
> I was thinking the pads would have a small detent the IC would settle into
> but apparently no such luck.  It would just make it easier to line up.  The
> people I have doing my assembly have a hard time as I imagine most people
> do.

Ah, manual placement, people generally put a silk border that is the
same size as the BGA chip and that is used to visually line it up. For
production using pick and place machines, talk to your assembly house,
they'll recommend fiducial configurations.

> On Thu, Jul 18, 2013 at 12:51 PM, Bob Paddock <graceindustries AT gmail DOT com>
> wrote:
>>
>> > The other is applying a thin layer of
>> > flux to the area of the BGA footprint.
>>
>> Make sure there is a clear path for water flow (cleaning fluids) for
>> ingress and egress of the flux.
>>
>> Makes a difference in reliability of high impedance circuits and ultra
>> low power circuits.
>>
>> "Make it smaller" does not always go well with "make it manufacturable"
>> when
>>  hard to clean parts (BGA/QFN/LCC/LGA) are surrounded by things like
>> bypass caps for example. :-(
>
>

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