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Message-ID: | <5161C411.3020303@icarus.com> |
Date: | Sun, 07 Apr 2013 12:08:01 -0700 |
From: | Stephen Williams <steve AT icarus DOT com> |
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To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] PHDL to PCB conversion path? |
References: | <BAY167-W13054F420737D6BC4ABA461C4E50 AT phx DOT gbl> <51397061 DOT 1090306 AT mcmahill DOT net> <201303080608 DOT r2868TbB005738 AT envy DOT delorie DOT com> |
In-Reply-To: | <201303080608.r2868TbB005738@envy.delorie.com> |
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Reply-To: | geda-user AT delorie DOT com |
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 03/07/2013 10:08 PM, DJ Delorie wrote: > With PCB's new import option, there's only one file, which is a set > of commands to pcb to tell it what the connectivity and BOM > *should* be (including pin labels and compoent attributes). PCB > compares that to what *is* and makes the needed changes. Is there documentation for this One file somewhere. I've been fiddling with a very similar thing using Icarus Verilog: a "pcb" code generator to generate PCB input from Verilog netlists. - -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iEYEARECAAYFAlFhxBEACgkQrPt1Sc2b3ikrdwCZAV5V3NCaPgboxmoAg8vd6E+s 8RUAoIYVwZOeGihOz4Yh3zzE1hcqHIs0 =RA3F -----END PGP SIGNATURE-----
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