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Mail Archives: geda-user/2013/01/29/02:53:50

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Message-ID: <51077FE7.8030109@xs4all.nl>
Date: Tue, 29 Jan 2013 08:53:11 +0100
From: Bert Timmerman <bert DOT timmerman AT xs4all DOT nl>
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To: geda-user AT delorie DOT com
Subject: Re: [geda-user] Accessing bottom silk
References: <CAB3Sx6erT4DsQCfk6G4snO88f0TCpF4oUNMR7NeRVjdnUrnJAQ AT mail DOT gmail DOT com> <ke79ub$p4c$1 AT ger DOT gmane DOT org>
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Reply-To: geda-user AT delorie DOT com

Kai-Martin Knaak wrote:
> bsalinux AT gmail DOT com wrote:
>
>    
>> I opened up the PCB file in text editor and saw that there are two
>> silk layers: Layer(5 "silk")
>> Layer(6 "silk")
>>      
> BTW, any chance that my silk layer patch gets accepted (or rejected)
> any time soon? The patch replaces the hard coded string "silk" with
> "top silk" and "bottom silk".
>
> ---<)kaimartin(>---
>    
Hi Kai-Martin,

Your patches live in a topic branch in the upstream pcb repo.

See here:  http://git.geda-project.org/pcb/log/?h=LP1035979

I will test these more thorough when I have some free cycles.

Kind regards,

Bert Timmerman.

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