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Mail Archives: geda-user/2013/01/18/11:30:40

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Date: Fri, 18 Jan 2013 21:59:43 +0530
Message-ID: <CACNnPRm2cmrwnd9cK7nnO0fEQPV4_fNM4B1C2=8n7j0hyTQfdA@mail.gmail.com>
Subject: Re: [geda-user] gnetlist hierarchy uref order setting
From: Abhijit Kshirsagar <abhijit86k AT gmail DOT com>
To: geda-user AT delorie DOT com
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Oh ok. Yes I agree with the spice commands being in a separate file,
but I can't write the makefile by hand- simply because I (will) have
too many symbols each with a schematic. So I think i'll have to try to
write a makefile generator...

-Abhijit

On 1/17/13, John Doty <jpd AT noqsi DOT com> wrote:
>
> On Jan 16, 2013, at 11:21 PM, Abhijit Kshirsagar wrote:
>
>>> Interesting. Stuart seems not to have implemented refdes "munging" for
>>> all of the components he lists at
>>> http://www.brorson.com/gEDA/SPICE/x631.html.
>>
>> So does that count as a bug?
>
> I think so. Mismatch between code and documentation always counts as a bug
> as far as I'm concerned.
>
>>
>>> Put (hierarchy-traversal "disabled") in your gnetlistrc. Then I netlist
>>> subcircuits separately and
>>> let SPICE do the hierarchy expansion. See
>>> http://www.brorson.com/gEDA/SPICE/intro.html.
>>
>> I've looked through this - and it seems to be the same as the RF
>> example that ships with the gEDA distribution.
>> As i understand, I need to generate the cir files from the
>> sub-schematics first, then netlist the top level schematics.
>
> Yes. The spice-sdb back end normally does the inclusion of model files for
> you. Even if you turn this off with -I, it inspects model files to figure
> out whether they are macro models (.SUBCKT) or primitive model parameters
> (.MODEL). Thus, all model files that a schematic page uses must exist prior
> to invoking the netlister. I consider this a misfeature.
>
> Since SPICE has no scoping of subcircuit or model names, it is useless to
> include the same model file repeatedly in different contexts, but that's
> what spice-sdb does, unfortunately. I prefer to have a Makefile use "cat" to
> assemble the final netlist from the individual subcircuit netlists.
>
>>
>> Do most people use something like a makefile, when systems become
>> large? Is there a makefile generator out there?
>>
>
> I just write a Makefile. No generator.
>
>> I was hoping to have everything (including the SPICE simulation
>> commands) in schematics only - so the end user only needs to keep
>> gSCHEM open and navigate the hierarchy to see the entire design.
>
> Well, it makes more sense to me to edit things like .CONTROL sections in a
> text editor rather than a graphics editor. And, as noted above, I prefer to
> assemble the simulation file with "cat" rather than gnetlist: this gives me
> much better control. Also, I often have very large test stimulus files,
> megabytes of PWL commands, generated by separate scripts. It's not practical
> to put *those* in a schematic. But if you want, you can put your extra stuff
> in spice-directive symbols. You can even put multi-line code into the value=
> attribute by editing the attribute as text ("ex" rather than "ee").
>
> John Doty              Noqsi Aerospace, Ltd.
> http://www.noqsi.com/
> jpd AT noqsi DOT com
>
>
>
>


-- 
~Abhijit

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