Mail Archives: geda-user/2012/03/01/01:05:48

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Date: Thu, 01 Mar 2012 00:51:44 -0500
From: Gus Fantanas <fantanas AT innocent DOT com>
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To: geda-user AT delorie DOT com
Subject: Re: [geda-user] Vias smaller than 21mil; making REFDES disappear
in PCB
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Reply-To: geda-user AT delorie DOT com

On 02/29/2012 01:29 AM, Russell Dill wrote:
>> (2) I am laying out a board where the layout is very tight.  There is no
>> room for REFDESes.  However, I will need the REFDESes in the printout of the
>> layout because the board will assembled by hand.  I would like a way to turn
>> the REFDESes on the PBC  selectively on and off, so when I print the gerbers
>> to send to fab house, the REFDESes which take too much space will not show
>> up, but I can still turn on the REFDESes at a later time, when I print the
>> layout at some magnification. The silkscreen contains some items I would
>> like printed on the actual PCB, so it is not an issue of turning the
>> silkscreen on and off.  I manipulated the PCB with vim, turning all REFDES
>> sizes to zero.  Unfortunately, PCB printed little blobs on the silkscreen
>> then.  Any ideas?
> What you want is an assembly drawing.
Yes, you nailed it!
> PCB has some support for this,
> just not the features you want. There is a pretty good example here:
Thank you!
> Modifying PCB to support that would be pretty easy. The first step
> would be would be always printing the refdes in the center of the
> part. The second would be specifying some flag for certain pads not to
> print so that they don't obscure the refdes, this could be automatic.
> And the third would be to add an optional outline layer for
> footprints. If the layer is there, it uses that, otherwise it uses the
> silk.
I would like to suggest this as a future feature, along with 
buried/blind vias.  If, in PCB, there were a way to copy the component 
and solder layers each to a different layer, then both of the new layers 
could become the assembly drawing.  For now, if I could move the 
refdes'es to another layer, that, too, would do it.  I would move the 
troublesome refdes'es to other layers and just not submit the gerbers 
for these layers.  To come up with an assembly schematic, I could print 
(or export) these layers along with the component and solder layers at 
the appropriate magnification.

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