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From:	"karl AT aspodata DOT se [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To:	geda-user AT delorie DOT com
Subject:	Re: [geda-user] Single-sided PCBs: fabrication layer reports plated holes, which may confuse manufacturers
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Comments:	In-reply-to "Claudio Fabri (clafi AT gmx DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
	message dated "Fri, 06 Oct 2023 01:20:46 +0200."
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Date:	Fri, 6 Oct 2023 20:37:57 +0200 (CEST)
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Cladio Fabri:
> I've just noticed a small detail that I can't seem to find an easy fix
> for. I've designed a single sided PCB and in the fabrication layer, all
> holes are marked "Plated? YES"¹. This may confuse the manufacturer,
> IMHO.

You want unplated holes with annulus ?

I don't think that's supported in pcb. There is a "hole" flag for pins,
that gives you unplated holes, yes, but there will be no annulus, sorry.

You might go the postprocess route or turn to pcb-rnd.

Regards,
/Karl Hammar

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