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From:	"Erich Heinzle (a1039181 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
Date:	Fri, 6 Oct 2023 16:04:59 +1030
Message-ID:	<CAHUm0tOZ7TiVMg+KisQjk-J-jemmaySOu0W8pkF0TUSpmUnDpQ@mail.gmail.com>
Subject:	Re: [geda-user] Single-sided PCBs: fabrication layer reports plated
	holes, which may confuse manufacturers
To:	geda-user AT delorie DOT com
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Reply-To:	geda-user AT delorie DOT com

A simple solution would be to load the layout into pcb-rnd.

Once loaded, the :padstackedit() command can be used to bring up a
dialogue window which allows you to alter the plate through plating
status of the through hole padstack/via hole or slot. The user can
also edit the apertures on the various layers, i.e. top copper, top
soldermask, inner copper, bottom copper, bottom soldermask. For a
single sided board, you could in theory remove the top copper, inner
copper and solder mask apertures.

There is a visual indication in pcb-rnd of a padstack's plate through
status, which can be seen to change when toggling the status.

There is also an explicit fab layer visible in the layout editor,
which can be viewed and also have text annotations added if needed.

More advanced techniques can use the built in search tools within
pcb-rnd which allow objects with particular properties to be selected,
and then have properties set.

Once the padstack properties have been modified, the layout can be
exported with the CAM export menu item. This allows CAM exports such
as gerber to be scripted for particular end applications, but there
are plenty of supplied standard formats, including seeed, oshpark,
universal, eagle format etc... which target the particular naming
convention for the given manufacturer.

Some manufacturers will merge the unplated and plated hole files
anyway, but if the gerber and excellon files properly show which holes
are unplated vs those which are plated, and the top layer has no
copper features, that might make things more explicit for the
manufacturer's pre-manufacture checks of a single sided board.

Regards,

Erich.


On Fri, Oct 6, 2023 at 9:56 AM Claudio Fabri (clafi AT gmx DOT com) [via
geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>
>
> Hi.
>
> I've just noticed a small detail that I can't seem to find an easy fix
> for. I've designed a single sided PCB and in the fabrication layer, all
> holes are marked "Plated? YES"¹. This may confuse the manufacturer,
> IMHO.
>
> (I know I could include a note in the "Outline" layer saying no holes
> are plated, contrary to what's listed but it doesn't look very
> "professional" IMHO.)
>
> As per http://wiki.geda-project.org/geda:pcb_tips these are just names
> all right but is there a way to sort this out?
>
> FTR my manufacturer of choice is EuroCircuits.com and I know I can chat
> with them to clarify it all but if there's an easy way to avoid that...
>
> Thanks in advance for any hint/suggestion.
>
> ¹ In my case, the generated gerber file with extension ".fab" in the
> "Eagle" export type.
>
> C.F.
>

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