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Mail Archives: geda-user/2023/10/05/19:21:42

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Date: Fri, 6 Oct 2023 01:20:46 +0200
From: "Claudio Fabri (clafi AT gmx DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To: gEDA Mailing List <geda-user AT delorie DOT com>
Subject: [geda-user] Single-sided PCBs: fabrication layer reports plated holes, which
may confuse manufacturers
Message-ID: <20231006012046.3cd1e959@amanite>
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Reply-To: geda-user AT delorie DOT com

Hi.

I've just noticed a small detail that I can't seem to find an easy fix
for. I've designed a single sided PCB and in the fabrication layer, all
holes are marked "Plated? YES"¹. This may confuse the manufacturer,
IMHO.

(I know I could include a note in the "Outline" layer saying no holes
are plated, contrary to what's listed but it doesn't look very
"professional" IMHO.)

As per http://wiki.geda-project.org/geda:pcb_tips these are just names
all right but is there a way to sort this out?

FTR my manufacturer of choice is EuroCircuits.com and I know I can chat
with them to clarify it all but if there's an easy way to avoid that...

Thanks in advance for any hint/suggestion.

¹ In my case, the generated gerber file with extension ".fab" in the
"Eagle" export type.

C.F.

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