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Date:	Sun, 5 Mar 2023 15:45:03 +0100 (CET)
From:	Roland Lutz <rlutz AT hedmen DOT org>
To:	"Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
cc:	Bert Timmerman <ljh4timm AT xs4all DOT nl>
Subject:	[geda-user] Connecting pads directly to polygons (was: Strange errors importing
	gschem into PCB)
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On Sun, 5 Mar 2023, Richard Rasker (rasker AT linetec DOT nl) [via 
geda-user AT delorie DOT com] wrote:
> Op 04-03-2023 om 23:24 schreef Roland Lutz:
>> This patch should fix the issue:
>> https://github.com/rlutz/geda-gaf/commit/9b74190843364861b9fc6841d927dc2747d63488 
>
> Thank you for this quick fix! This indeed solves the problems with 
> unconnected duplicate pins.

Thank you for testing the patch!


> Final question: is there a way to connect pads directly to polygons 
> without the DRC warning "Pad with insufficient clearance inside 
> polygon"? Lines can be connected to polygons using 'J(oin)', but that 
> doesn't work for pads.
>
> In some older designs with lots of thermal and high-current pads I now 
> get almost a hundred of these DRC warnings, increasing the risk of 
> overlooking any new, real DRC issues. I guess I could trace the outline 
> of e.g. TO252 tabs, using 'J' to connect them to the surrounding 
> polygon, but that feels like a bit of a messy kludge.
>
> Maybe it is possible to prevent this Design Rule from being applied when 
> the clearance is actually zero? Because I'd say that unintentional 
> shorts are already caught by the connection check, and that this rule 
> check is only needed to locate non-zero distances that are too small.

I'm not too familiar with PCB.  Maybe Bert can help?

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