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Mail Archives: geda-user/2023/03/05/06:37:02

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Message-ID: <10d1f03e-fb47-1489-8d45-c412ecfd9e5a@linetec.nl>
Date: Sun, 5 Mar 2023 12:17:05 +0100
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Subject: Re: [geda-user] Strange errors importing gschem into PCB
To: geda-user AT delorie DOT com
References: <e142bdaf-597f-6219-5653-993cf530a50a AT linetec DOT nl>
<40bb8153-a4f9-b79c-b4db-d5ed94516e67 AT grinsen-ohne-katze DOT de>
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<92b8456a-9852-1b10-90de-fa29211ce6e3 AT grinsen-ohne-katze DOT de>
From: "Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Hi Roland,

Op 04-03-2023 om 23:24 schreef Roland Lutz:
> Hi Richard,
>
> On Sat, 4 Mar 2023, Richard Rasker (rasker AT linetec DOT nl) [via 
> geda-user AT delorie DOT com] wrote:
>> Op 04-03-2023 om 20:19 schreef Roland Lutz:
>>> this happens if the GTK2 bindings for Python are missing.
>>
>> Yes, I see a question asking if pygtk is installed. However, I can't 
>> find any package by that name. Or is this part of another package?
>
> IIRC, Debian decided a while ago to drop support for pygtk and only 
> support introspection-based bindings, which in turn only work with 
> Python 3.

OK, so this can't be fixed (using Kubuntu at the moment)? Not too much 
of a problem, I just have to remember to run pcb from the command line 
if unexpected things happen (or don't happen).

>>> As a workaround, you can copy the power connections to all instances 
>>> of the dual opamp symbol (make sure to swap them for the top-left, 
>>> flipped symbol).
>>
>> Yes, thanks, that works.
>
> This patch should fix the issue:
> https://github.com/rlutz/geda-gaf/commit/9b74190843364861b9fc6841d927dc2747d63488 
>

Thank you for this quick fix! This indeed solves the problems with 
unconnected duplicate pins.

Final question: is there a way to connect pads directly to polygons 
without the DRC warning "Pad with insufficient clearance inside 
polygon"? Lines can be connected to polygons using 'J(oin)', but that 
doesn't work for pads.

In some older designs with lots of thermal and high-current pads I now 
get almost a hundred of these DRC warnings, increasing the risk of 
overlooking any new, real DRC issues. I guess I could trace the outline 
of e.g. TO252 tabs, using 'J' to connect them to the surrounding 
polygon, but that feels like a bit of a messy kludge.

Maybe it is possible to prevent this Design Rule from being applied when 
the clearance is actually zero? Because I'd say that unintentional 
shorts are already caught by the connection check, and that this rule 
check is only needed to locate non-zero distances that are too small.

Anyway, thanks again,

Regards,

Richard

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