Mail Archives: geda-user/2023/03/04/16:47:29
Hello Roland,
Op 04-03-2023 om 20:19 schreef Roland Lutz:
> Hi Richard,
>
> On Sat, 4 Mar 2023, Richard Rasker (rasker AT linetec DOT nl) [via
> geda-user AT delorie DOT com] wrote:
>> However, things are somehow broken now. Nothing happens when I choose
>> File
>> -> Import Schematics -> gschem to import a slightly modified
>> schematic, and
>> the Log window also doesn't show an error message.
>
> this happens if the GTK2 bindings for Python are missing.
Yes, I see a question asking if pygtk is installed. However, I can't
find any package by that name. Or is this part of another package?
>> When I start PCB from the command line, I see the following errors
>> when I
>> try importing the schematic:
>>
>> Loading schematic [/home/richard/electron/Test/Test_Err.sch]
>> package `U101' (unmangled), pin `8': error: multiple nets connected
>> to pin:
>> "5V" vs. "unconnected_pin-2"
>> package `U101' (unmangled), pin `4': error: multiple nets connected
>> to pin:
>> "GND" vs. "unconnected_pin-3"
>> package `U102' (unmangled), pin `8': error: multiple nets connected
>> to pin:
>> "unconnected_pin-4" vs. "5V"
>> package `U102' (unmangled), pin `4': error: multiple nets connected
>> to pin:
>> "unconnected_pin-5" vs. "GND"
>> could not open action file "/tmp/pcb.XX9e3A0V/gnetlist_output"
>>
>> […]
>>
>> Does anyone have an idea what is wrong here?
>
> I added a few sanity checks to gnetlist which are supposed to catch
> common errors in the input schematics, like in this case, a pin being
> connected to one net in one (partial) symbol and to another net in
> another symbol. Apparently, this check is too strict: since you didn't
> connect the power pins in one of the symbols, gnetlist inserted an
> automatic "unconnected pin" net which conflicts with the power net.
>
> As a workaround, you can copy the power connections to all instances
> of the dual opamp symbol (make sure to swap them for the top-left,
> flipped symbol).
Yes, thanks, that works.
Another new thing that I noticed is that I now get tons of DRC errors
for pads that are directly connected to polygons ("Pad with insufficient
clearance inside polygon"). I have lots of devices that need to be
connected to polygons, e.g. ICs with exposed ground pads that must be
connected to GND and power MOSFETs that need copper area as a heatsink.
Can I turn off these errors? And how am I supposed to make these
connections without getting those error messages?
Richard
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