Mail Archives: geda-user/2022/08/17/17:49:34
On Wed, Aug 17, 2022 at 08:43:36PM +0200, Richard Rasker (rasker AT linetec DOT nl) [via geda-user AT delorie DOT com] wrote:
> First of all, thank you all for your ideas!
>
> Op 17-08-2022 om 17:37 schreef Britton Kerin (britton DOT kerin AT gmail DOT com) [via
> geda-user AT delorie DOT com]:
> > On Wed, Aug 17, 2022 at 6:36 AM Erich Heinzle (a1039181 AT gmail DOT com)
> > [via geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
> > > Two thoughts
> > >
> > > 1) I have heard of many people doing reflow at home who use locating pins on a precisely drilled support block that positively locates the pcb itself and the overlying stencil with matching holes when applying the paste
> > >
> > > 2) It could be that your apertures in the stencil are not optimal. Smaller apertures may allow more precise results. IIRC gEDA PCB solder mask aperture shrinkage relative to the pad shape can only be defined, if at all, on a whole board basis.
> > You can set this per-footprint. The paste blobs on the SMT part look
> > a tiny bit bigger than what I generally use, though it's difficult to
> > judge exactly.
> > The paste layer also looks somewhat thick. How thick is your stencil?
>
> The stencil is 100 microns thick.
>
> > Also the paste does look a little thin. I use a leaded paste for
> > prototypes (though I doubt that's the issue here).
> >
> > > pcb-rnd treats each pad as a padstack, where layer apertures on each layer can be defined individually, or autogenerated, in the :padstackedit action.
> > pcb-rnd is not needed to control this.
>
> The responses seem to converge on the following:
>
> > I think the other reply is correct, and there is some stencil movement
> > at some stage in the process.
>
> Yes, I think that somehow, the stencil isn't fixed on the PCB all that well,
> and that some sideways movement is happening, as well as vertical movement
> just before or after the squeegee passes. The latter is probably what causes
> the extra thickness and subsequent running together.
>
> After posting this question and awaiting the first responses, I tried
> several more PCB's, this time focusing on on any stencil movement relative
> to the PCB, and I found that the 'hinge' tape at the bottom edge indeed
> tends to develop a bit of slack, especially when the tape is not replaced
> after every PCB.
>
> > What I've always done is use scotch
> > tape to tape the board directly to the stencil on all four edges of
> > the board. Once the paste is on I pinch the board and stencil
> > together and slit three pieces of the tape, leaving the fourth to act
> > as a hinge. I then rotate the stencil and board apart using this
> > hinge.
>
> I shall definitely try this method the next time -- those haphazard,
> inconsistent results are far more frustrating than a somewhat more laborious
> procedure that gives far better results.
>
> Or perhaps it's an idea to use a bench-top tool such as this one: https://be.eurocircuits.com/shop/offtheshelf/product.aspx?ad=13777&ano=ec-stencil-mate&an=ec-stencil-mate
> ?
>
> (Eurocircuits can supply stencils with tooling to fit in this machine.)
>
> But first I'll see if I can get better results by simply paying more
> attention to fixating the PCB relative to the stencil.
>
> > I don't use any external framework. I'm sort of surprised
> > this works but I've only once had a small bridge and not as bad as
> > what you're showing in dozens of SMT boards, and no other fab-related
> > failures ever. I think rotating up is the key, as it doesn't seem
> > like it would be possible to reliably pick the entire stencil up
> > without introducing transverse movement.
> I also press down on the stencil and then 'peel' it up from the PCB from one
> corner, but when the fixing tape is a bit slack, this doesn't help all that
> much.
> > btw pcbway is ~$450 even for smallish advanced process boards with
> > impedance control etc. and I've found them to be very helpful.
> >
> > Britton
>
> Once again, thank you all for your helpful replies, also the ones about
> solder mask sizes -- I think I'll reduce at least the big ground planes
> underneath those QFN's, as these tend to present the most problems.
Definitely, these ones need 65-70% area coverage from my experience,
anything above 80% is a disaster. And this is with QFN with quite a few
PTH for thermal dissipation on the internal layers or other side (with
solder mask removed on the other side also).
Regards,
Gabriel
>
> Best regards,
>
> Richard
>
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