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From:	"gene glick (geneglick AT optonline DOT net) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
Date:	Sun, 25 Oct 2020 13:13:47 -0400
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Subject:	Re: [geda-user] PCB, 2 parts physically in the same place
To:	geda-user AT delorie DOT com
Reply-To:	geda-user AT delorie DOT com

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Content-Type: text/plain; charset="UTF-8"

Hi Chad,

I'll send you the layout later today. It's non proprietary,  just a
personal project.  The layout is complete,  and I just have deleted the
part from the layout, but not the schematic. So the program complains a
little.

I'll send you 2 versions. First the completed layout.  Second,  I'll add
back the missing connector, remove the thermals and you can see for
yourself.

While writing this,  it occurs to me that maybe I can add the thermals
first and then place the 2nd connector in that same location.

Gene

On Sun, Oct 25, 2020, 11:26 AM Chad Parker (parker DOT charles AT gmail DOT com) [via
geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:

> Hi Gene-
>
> pcb will "allow" you to do basically anything. It should not prevent you
> from overlapping the components. This shouldn't even generate a DRC warning.
>
> As a general rule, pcb assumes that the human designer knows best and
> shouldn't prevent you from doing most things. It may complain with a DRC
> warning, but it won't actually prevent you from doing it.
>
> Regarding the plane connection, pcb thermals should work for through-hole
> components. The surface-mount thermals are implemented yet.
>
> I assume that the overlap warning isn't the one at 0,0 that we discussed
> previously? It's helpful to have the problematic file to evaluate. I've
> just done a couple of quick tests, and I am able to do what you're
> describing in my test cases.
>
> Thanks,
> --Chad
>
> On Sat, Oct 24, 2020 at 9:41 PM gene glick (geneglick AT optonline DOT net) [via
> geda-user AT delorie DOT com] <geda-user AT delorie DOT com> wrote:
>
>> I want to do this on purpose. One part, a 2X16 character display has 10
>> connections to the PCB. Problem is, they are just holes. It is meant to
>> have a 10 pin header on the PCB, and then the display gets positioned over
>> the header and soldered in place. So I placed a 10-pin header in the same
>> location that the display holes. They line up perfectly but the sizes are
>> slightly different (a little more or less annulus for example).
>>
>> I could simply get rid of the 10-pin header (yeah, I think that's the way
>> to go in the short term), and remember to order it. If it's in the
>> schematic though, it gets into the BOM...which is good.
>>
>> Anyway, PCB doesn't allow a couple of things - I cannot make a thermal
>> connection to the plane on either top or bottom of board. Instead, I made
>> some traces to the plane. Now DRC reports a problem with too little overlap.
>>
>> Is this a bug?
>>
>

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Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

<div dir=3D"auto">Hi Chad,<div dir=3D"auto"><br></div><div dir=3D"auto">I&#=
39;ll send you the layout later today. It&#39;s non proprietary,=C2=A0 just=
 a personal project.=C2=A0 The layout is complete,=C2=A0 and I just have de=
leted the part from the layout, but not the schematic. So the program compl=
ains a little.=C2=A0</div><div dir=3D"auto"><br></div><div dir=3D"auto">I&#=
39;ll send you 2 versions. First the completed layout.=C2=A0 Second,=C2=A0 =
I&#39;ll add back the missing connector, remove the thermals and you can se=
e for yourself.</div><div dir=3D"auto"><br></div><div dir=3D"auto">While wr=
iting this,=C2=A0 it occurs to me that maybe I can add the thermals first a=
nd then place the 2nd connector in that same location.</div><div dir=3D"aut=
o"><br></div><div dir=3D"auto">Gene</div></div><br><div class=3D"gmail_quot=
e"><div dir=3D"ltr" class=3D"gmail_attr">On Sun, Oct 25, 2020, 11:26 AM Cha=
d Parker (<a href=3D"mailto:parker DOT charles AT gmail DOT com">parker DOT charles AT gmail.=
com</a>) [via <a href=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT co=
m</a>] &lt;<a href=3D"mailto:geda-user AT delorie DOT com">geda-user AT delorie DOT com</=
a>&gt; wrote:<br></div><blockquote class=3D"gmail_quote" style=3D"margin:0 =
0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir=3D"ltr"><div=
>Hi Gene-</div><div><br></div><div>pcb will &quot;allow&quot; you to do bas=
ically anything. It should not prevent you from overlapping the components.=
 This shouldn&#39;t even generate a DRC warning.</div><div><br></div><div>A=
s a general rule, pcb assumes that the human designer knows best and should=
n&#39;t prevent you from doing most things. It may complain with a DRC warn=
ing, but it won&#39;t actually prevent you from doing it.<br></div><div><br=
></div><div>Regarding the plane connection, pcb thermals should work for th=
rough-hole components. The surface-mount thermals are implemented yet.</div=
><div><br></div><div>I assume that the overlap warning isn&#39;t the one at=
 0,0 that we discussed previously? It&#39;s helpful to have the problematic=
 file to evaluate. I&#39;ve just done a couple of quick tests, and I am abl=
e to do what you&#39;re describing in my test cases. <br></div><div><br></d=
iv><div>Thanks,</div><div>--Chad<br></div></div><br><div class=3D"gmail_quo=
te"><div dir=3D"ltr" class=3D"gmail_attr">On Sat, Oct 24, 2020 at 9:41 PM g=
ene glick (<a href=3D"mailto:geneglick AT optonline DOT net" target=3D"_blank" rel=
=3D"noreferrer">geneglick AT optonline DOT net</a>) [via <a href=3D"mailto:geda-us=
er AT delorie DOT com" target=3D"_blank" rel=3D"noreferrer">geda-user AT delorie DOT com<=
/a>] &lt;<a href=3D"mailto:geda-user AT delorie DOT com" target=3D"_blank" rel=3D"=
noreferrer">geda-user AT delorie DOT com</a>&gt; wrote:<br></div><blockquote class=
=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left:1px solid rg=
b(204,204,204);padding-left:1ex"><div dir=3D"ltr"><div>I want to do this on=
 purpose. One part, a 2X16 character display has 10 connections to the PCB.=
 Problem is, they are just holes. It is meant to have a 10 pin header on th=
e PCB, and then the display gets positioned over the header and soldered in=
 place. So I placed a 10-pin header in the same location that the display h=
oles. They line up perfectly but the sizes are slightly different (a little=
 more or less annulus for example).</div><div><br></div><div>I could simply=
 get rid of the 10-pin header (yeah, I think that&#39;s the way to go in th=
e short term), and remember to order it. If it&#39;s in the schematic thoug=
h, it gets into the BOM...which is good.</div><div><br></div><div>Anyway, P=
CB doesn&#39;t allow a couple of things - I cannot make a thermal connectio=
n to the plane on either top or bottom of board. Instead, I made some trace=
s to the plane. Now DRC reports a problem with too little overlap.</div><di=
v><br></div><div>Is this a bug?=C2=A0<br></div></div>
</blockquote></div>
</blockquote></div>

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