Mail Archives: geda-user/2017/07/20/15:03:49
John Doty wrote:
>
>> On Jul 20, 2017, at 10:54 AM, John Griessen (john AT ecosensory DOT com
>> <mailto:john AT ecosensory DOT com>) [via geda-user AT delorie DOT com
>> <mailto:geda-user AT delorie DOT com>] <geda-user AT delorie DOT com
>> <mailto:geda-user AT delorie DOT com>> wrote:
>>
>> xschem:
>> VHDL / Verilog / Spice netlist, ready for simulation
>> Behavioral VHDL / Verilog code can be embedded as one of the
>> properties of the schematic block
>>
>>
>> These xschem abilities will be good goals to include in cschem.
>
> We already have these for SPICE in gEDA and Lepton if you use the
> gnet-spice-noqsi back end
> (https://github.com/noqsi/gnet-spice-noqsi) for gnetlist. I believe
> both Lepton and Roland’s gnetlist replacement now give the back end
> writer enough support to do Verilog and VHDL right. So, we don’t need
> a new tool, just a couple of new back ends.
>
> John Doty Noqsi Aerospace, Ltd.
>
> http://www.noqsi.com/
>
> jpd AT noqsi DOT com <mailto:jpd AT noqsi DOT com>
>
>
>
Hi John,
I'm afraid you do not comprehend ... this is going to happen ...
whatever arguments exist or comes up ... IIRC, the decision has
(probably) been made over a year ago ;-)
Get used to more choices for users ;-)
Kind regards,
Bert Timmerman.
@Igor2: go for it ;-)
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