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From:	Bdale Garbee <bdale AT gag DOT com>
To:	"Chad Parker \(parker.charles\@gmail.com\) \[via geda-user\@delorie.com\]" <geda-user AT delorie DOT com>,
	geda-user AT delorie DOT com
Subject:	Re: [geda-user] [pcb-rnd] tEDAx footprint load support
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Date:	Tue, 14 Mar 2017 16:32:16 -0600
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"Chad Parker (parker DOT charles AT gmail DOT com) [via geda-user AT delorie DOT com]"
<geda-user AT delorie DOT com> writes:

> Question (to all PCB engineers): how often do you rely on the clearance
> value set in a footprint?

It's the usual way to get the right spacing between a footprint feature
and fill on "plane" layers, right?  Since I do a fair number of boards
with significant RF content, I care a lot about that... but whether it's
achieved through clearance on the footprint or some other approach isn't
critical to me.  I don't think a one-size-fits-all-for-the-board
clearance number will suffice, though.

Bdale

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