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Subject:	Re: [geda-user] Microwave PCB layout simulation or How to eat all
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On Sat, 27 Aug 2016 02:18:11 +0000
"Evan Foss (evanfoss AT gmail DOT com) [via geda-user AT delorie DOT com]"
<geda-user AT delorie DOT com> wrote:

> How does gnucap-verilog solve this? I thought verilog was just another
> language for describing netlists and schematic behavior. 

It is.  Verilog as a netlist format is much richer than the spice
format.

We have documentation on how to include the layout physical info in the
Verilog netlist.

First cut is here:
http://gnucap.org/dokuwiki/doku.php?id=gnucap:user:netlist_import_and_export

There is more detail and revisions in my FOSDEM presentation.


> How does that
> get us closer to testing a pcb level implementation of a Wilkinson
> splitter or a distributed element filter? I would think we would need
> FEM of some kind to extract the relevant properties of the layout and
> then process them for conversion into verilog?

The first step is to transfer the data.  Once the data is moved to a
format that gnucap understands, the gnucap project can take it from
there.

More detail. ...

There are two parts here.  

One part is making a netlist, comprised
mostly of transmission lines, or a more abstract device that is a
transmission line underneath.  

The other part is to parameterize the
transmission lines.  Initially, the parameters can be geometry.  There
are simple closed form equations to generate electrical parameters that 
work well for simple structures.  Getting this far is a big
accomplishment. For more complex structures you need a field solver.
There are free field solvers available.  (OpenEMS and others)  We just
need to interface to them.

Hyperlynx actually uses a mix of field solver and closed form equations.

If what you want to see is radiation, you might be able to do it all
with the field solver.

For signal integrity, they all do it as a 2-step process, with one of
the steps being a circuit simulator, usually not spice.

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