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From: | geda AT psjt DOT org (Stephan =?utf-8?Q?B=C3=B6ttcher?=) |
To: | "John Griessen \(john\@ecosensory.com\) \[via geda-user\@delorie.com\]" <geda-user AT delorie DOT com> |
Subject: | Re: [geda-user] Wilkinson splitter - how to implement and use? |
References: | <23abdc31 DOT 72365e7a DOT 572529a9 DOT 212e2 AT o2 DOT pl> |
<a5562efe70ac4b83b066facd19a46167 AT gwp> | |
<20160801162742 DOT GA27552 AT recycle DOT lbl DOT gov> | |
<20160801184707 DOT 7b3dda2d3c0d13e103a5ec59 AT gmail DOT com> | |
<a7acaf21-df0d-d209-d053-fcc470762ea3 AT ecosensory DOT com> | |
Date: | Mon, 01 Aug 2016 21:36:39 +0200 |
In-Reply-To: | <a7acaf21-df0d-d209-d053-fcc470762ea3@ecosensory.com> (John |
Griessen's message of "Mon, 1 Aug 2016 12:21:48 -0500") | |
Message-ID: | <s6n60rkz3g8.fsf@blaulicht.dmz.brux> |
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"John Griessen (john AT ecosensory DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> writes: > There will be a need for resistive layers that can connect, yet not > trigger a short because of their attributes. Such resistive layers > would need to be inside a footprint boundary always to avoid big > trouble. Can we please work towards more orthogonality? Try not to add more differences to the layout features inside and outside footprints, please. I see that there is a problem with connectivity checks when a resistive layer connects to conductive copper. You want to flag all connections that are not part of the same footprint? -- Stephan
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