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| Sat, 12 Mar 2016 10:42:55 -0800 (PST) | |
| Date: | Sat, 12 Mar 2016 19:42:50 +0100 |
| From: | "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
| To: | geda-user AT delorie DOT com |
| Subject: | Re: [geda-user] gnetlist shorting wires |
| Message-Id: | <20160312194250.8ccc0a06fb0c340ed8528ecd@gmail.com> |
| In-Reply-To: | <20160312190143.Horde.a2q0QqlyA98Umat0XyCMHNT@webmail.in-berlin.de> |
| References: | <20160312145647 DOT Horde DOT toH7mUmRASGNT3axa-gppQG AT webmail DOT in-berlin DOT de> |
| <EE0E9851-80F4-4257-A9F6-30F0273A03A8 AT noqsi DOT com> | |
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| <C6F55A3E-471A-47FA-8C15-A05B484761F2 AT noqsi DOT com> | |
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> Thanks for your answer. > > Quoting John Doty <jpd AT noqsi DOT com>: > > > Ok. One problem is that you’re not using the right IO symbols for > > hierarchy. You should be using in-1 or out-1, matching refdes of the > > symbol to the corresponding pinlabel of the symbol that represents > > your subcircuit. Here’s a working bottom-level schematic and the > > symbol that instantiates it: > > I look at it and got the same questions as Nicklas - what's the trick that > your i/o symbols work and mine not? > I ask 'cause my schematics contains some io-lines for the upper schematic, > which are bi-directional, not only input or output. Or is that the > point, gnetlist > stumbles about? I remember I had to change once. Nicklas Karlsson
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