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Sat, 12 Mar 2016 09:33:19 -0800 (PST) | |
Date: | Sat, 12 Mar 2016 18:33:14 +0100 |
From: | "Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> |
To: | geda-user AT delorie DOT com |
Subject: | Re: [geda-user] gnetlist shorting wires |
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> > What you've seen is the lowest level of a multi-level hiearchical design. Toplevel has sub-schematics which are instantiated many-times and contains sub-schematics itself.. > > Ok. One problem is that you’re not using the right IO symbols for hierarchy. You should be using in-1 or out-1, matching refdes of the symbol to the corresponding pinlabel of the symbol that represents your subcircuit. Here’s a working bottom-level schematic and the symbol that instantiates it: > It must be exactly this IO symbol on the subcircuit? Or are gnetlist looking at pin attributes so symbol on sub circuit must have a pin with correct attribute(s)? Nicklas Karlsson
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