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Date:	Mon, 7 Mar 2016 11:44:26 +0000
Message-ID:	<CAJXU7q_OOd-nJv0QeAczFv8AbQB-LReFnnMUzDHLFX+04+=NOA@mail.gmail.com>
Subject:	Re: [geda-user] hierarchical design - two symbols pointing to one schematic
From:	"Peter Clifton (petercjclifton AT googlemail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
To:	gEDA User Mailing List <geda-user AT delorie DOT com>
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On 7 Mar 2016 11:21, "Hagen SANKOWSKI" <hsank AT nospam DOT chipforge DOT org> wrote:
>
> Hello Peter.
>
> I did some stuff with the (unvisible) nets like VDD and GND for my
symbols and got
> out of this error.
> And yes, there is no recursivity inside.
> The tool just ate all the memory while renaming ports and nets which are
instantiated many times.. IMHO

If you can make a test case which reproduces this behaviour (or share your
design), it might be useful for the geda developers to look at and work out
why this is happening.

Even if there was bad usage of attributes, I'd not expect this kind of
behaviour unless there was a loop in the heirarchy (which is a known bad
case I believe).

Peter

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<p dir="ltr"><br>
On 7 Mar 2016 11:21, &quot;Hagen SANKOWSKI&quot; &lt;<a href="mailto:hsank AT nospam DOT chipforge DOT org">hsank AT nospam DOT chipforge DOT org</a>&gt; wrote:<br>
&gt;<br>
&gt; Hello Peter.<br>
&gt;<br>
&gt; I did some stuff with the (unvisible) nets like VDD and GND for my symbols and got<br>
&gt; out of this error.<br>
&gt; And yes, there is no recursivity inside.<br>
&gt; The tool just ate all the memory while renaming ports and nets which are instantiated many times.. IMHO</p>
<p dir="ltr">If you can make a test case which reproduces this behaviour (or share your design), it might be useful for the geda developers to look at and work out why this is happening.</p>
<p dir="ltr">Even if there was bad usage of attributes, I&#39;d not expect this kind of behaviour unless there was a loop in the heirarchy (which is a known bad case I believe).</p>
<p dir="ltr">Peter</p>

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