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> > Import, back-annotation. > > They are exporters. These things are not their province. That's the reason for this new project. > > Support for all symbols. > > What do you mean by that? All of the gnetlist spice netlisters contain a list of symbols that are explicitly translated, one at a time. This is a fundamental shortfall of the design. You have many times pointed out flaws in PCB where the design prevented what you consider to be sufficient generality. Now here the design is much more limited. > > Looking beyond that, all that plus: > > > > Verilog, VHDL completeness. > > > > To/from other schematic formats (Kicad, Qucs). > > Difficult. For flat netlists, there is a common understanding of what > the underlying abstraction is. The problem is mostly encoding (with a > few oddities like instance parameters in SPICE). For schematics, > there is no such general understanding. Yes it is difficult. The Gnucap project has a plan for this, with a different underlying abstraction. This underlying abstraction is well defined and much of the code for the general case is already written. We are looking for help to write translation plugins for some specific targets, in and out of the system, and inviting students to apply under Google Summer of Code.
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