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	Mon, 29 Feb 2016 10:50:57 -0800 (PST)
Date:	Mon, 29 Feb 2016 19:50:55 +0100
From:	"Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com>
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Subject:	Re: [geda-user] pcb import schematic crash, parantheses in netname
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> >>> gschem: hackish and limited, most of the limitations stem from
> >>> design, but it actually does its job surprisingly well on the
> >>> common daily stuff.
> >> 
> >> And on the uncommon stuff, too. Today's task is to assemble a SPICE
> >> file that, combined with other scripts, will allow a test engineer
> >> to plot the expected scope traces for a given configuration of an
> >> instrument with many configuration options.
> > 
> > Perhaps drawing a schematic for a spice simulation is common daily
> > stuff, then.
> 
> This isn’t so common, as it employs the subcircuit symbols, thus pulling in the same schematics that we use for Allegro layout. Is there any other EDA system that can do this? Usually, simulation schematics and layout schematics are different things.

To use a subcircuit symbol to make simulation on the same schematic as is used for real circuit is a very strong point about gEDA.

I sometimes use the same method to test software functions. In VHDL I think write test bench which is the same concept is very common.


Nicklas Karlsson

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