Mail Archives: geda-user/2016/02/28/12:32:44
Hello.
Thanks for your answer.
During this week I rectify my design, but still ending up - after a long,
long runtime something in hours on a VirtualBox with a lot of RAM and 4 CPUs -
with a gnetlist line which said: Killed.
Well, I tried to do my hierarchical design a little bit smaller and run just
a sup-page (which is still hierarchical) successfully thrue gnetlist.
I got a bunch of lines from gnetlist for my hierarchical design like this:
"Found a pin [Y300/Y2] on component [26] which does not have a label!"
Well, I found the Source Code via DuckDuckGo here (sorry for the bad
reference!)
http://ljh4timm.home.xs4all.nl/gaf/dox_gnetlist/s__hierarchy_8c_source.html
IMHO the arguments for the fprint(stderr, ..) function should be swapped.
00206 nl_current->component_uref,
00207 pl_current->pin_number);
The first argument should be the pin number, the second one should be
the component.
This lines, I guess, are coming from hidden VDD and GND nets inside my
hierachichal
symbols.
Nevertheless I like to feed my whole gschem-Design now into PCB now.
So who is killing my gnetlist-process inside gsch2pcb? Any suggestion how to
find/avoid the reason for the gnetlist-death?
Regards,
Hagen Sankowski
--
"They who can give up essential liberty to obtain a little temporary
safety, deserve neither liberty nor safety." Benjamin Franklin (1775)
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