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"Nicklas Karlsson (nicklas DOT karlsson17 AT gmail DOT com) [via geda-user AT delorie DOT com]" <geda-user AT delorie DOT com> writes: >> > But the first steps should not be "implement b/b vias" or "allow more >> > than one pair of outer layers". It should be something like "express >> > Elements and Vias as subclasses of generic containers that can include >> > anything". >> >> +1 >> >> John Doty Noqsi Aerospace, Ltd. >> http://www.noqsi.com/ >> jpd AT noqsi DOT com > > I am probably on same track. A via or hole is: drilled cut out thru > all layers with plating No. A via is a collection of circles, negative circles, thermals on conductive layers, and a circle on a layer connecting the copper circles. The technology and DRC ruleset knows that the circles shall be drilled at slightly larger diameter and filled with plating, and check the copper circles accordingly. But that is several orders up in the abstractions stack. -- Stephan
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